搜索资源列表
cpld_2440_c
- 用ispLEVER Starter软件开发的工程，逻辑用VHDL语言编写，源文件为ARMSYS2440CPLD.VHD 用于ARM2440控制CPLD-ARM2440_CPLD
clock_divider
- clock divider for fpga in verilog and vhdl it contains counter.vhd clock1.v clock_divider.doc-clock divider for fpga in verilog and vhdl it contains counter.vhd clock1.v clock_divider.doc
test1.vhd.tar
- Little program to test one actel pfga. Just make a simple pwm
comp1.vhd.tar
- another little test program
test2.vhd.tar
- 2nd test off pwm in fpga card
test3.vhd.tar
- 3th test off controlable-pwm in fpga card
multifreqvhdl
- 资料是本人根据相关文献资料用vhdl语言编写的旋转机械鉴相信号倍频的程序，multifre1.vhd是倍频程序，multifre1.vwf是仿真波形文件，stp1.stp是虚拟逻辑分析仪signaltap文件。该倍频程序可以直接使用，可以设置倍频数，修改实体参数N即可。-According to the literature data is the information I have written in with vhdl Rotating Machinery Kam believe tha
ICDesignVHDLTutorial
- 《集成电路设计VHDL教程》一书中的源文件，都是VHD格式的！-" IC Design VHDL Tutorial," a book of the source file is VHD format!
6_coder
- VHDL编写！8-3线编码器大全！ 包括 coder8_3.vhd 8线/3线编码器 coder8_3_1.vhd 8线/3线编码器 sn74ls148.vhd 8线/3线优先编码器 coder16_4.vhd 16线/4线优先编码器-VHDL write! 8-3 line encoder Daquan! Including coder8_3.vhd 8 line/3 line encoder coder8_3_1.vhd 8 line/3 line encoder sn7
7_decoder
- VHDL编写！数据选择器大全！ 包括： mux2to1.vhd 二选一电路 mux2_1.vhd 二选一电路 mux2_1.bdf 二选一电路 mux3to1.vhd 三选一电路 mux3to1_1.vhd 三选一电路 mux4to1.vhd 四选一电路 -VHDL write! Data selector Daquan! Including: mux2to1.vhd two choose a circuit mux2_1.vhd two choose a cir
uart16750
- UART 16750 source code for VHDL
dds5.0
- DDS电源设计，使用时须将SIN_ROM.VHD中的LPM_FILE修改为个人MIF文件的路径，本套程序中包含多个MIF文件，注意选用合适的文件。-DDS power supply design, use of LPM_FILE SIN_ROM.VHD shall modify the path for personal MIF file, this set of procedures in multiple MIF files, pay attention to choose the appr
Floating-Point-Adder
- 浮点数加法器IP核的vhd设计。浮点数加法运算是运输中使用最高的运算，结合vhdl和EPGA可编程技术，完成具有5线级流水线结构、符合IEEE 754浮点标准、可参数化为单、双精度的浮点数加法器。-Floating point adder design IP core vhd. Floating-point addition operation is used in most transport operations, combined with vhdl and EPGA programmab
Digitalclock
- 数字钟：好刻录机大哥和旅客的 得利卡刚和旅客的将离开对方非公开了就噶了空间的快乐记录卡就够了看见了健康的的啊看来固定价格两科噶及的旅客；攻击力看过个 啊的非公开了骄傲的噶的了科技是-Digital clock: a good writer and passenger Delica brother and visitors will just leave the other side closed the space on the Karmapa and the joy of memory car
ch17_I2C
- I2C总线协议，可以在quartus上仿真综合，通用性比较好-I2C bus protocol, the simulation can be integrated in quartus, better versatility
lcd.vhd
- 能够实现控制LCD显示的VHDL程序代码。-To achieve control of LCD display VHDL code.
VHD-CPLD7064-08.12.19
- 1553b总线的逻辑实现。这是一款航空总线，具有很强的实用价值。-1553b bus logic implementation. This is a air bus, has a strong practical value.
ledcontrol
- FPGA驱动LED静态显示 --文件名：ledcontrol.vhd --功能：译码输出模块，LED为共阳接法 -FPGA-driven LED static display- File Name: ledcontrol.vhd- Function: decode the output module, LED is connected in a total of Yang
plj
- --文件名：PLJ.vhd。 --功能：4位显示的等精度频率计。 --最后修改日期：2004.4.14。 -- File Name: PLJ.vhd.- Function: 4 display of equal precision frequency meter.- Last modified date: 2004.4.14.
freqmeter
- Working Frequencymeter, some files are useless, you just have to look to total.vhd and see what s usefull or not!