i2c_core/chips/i2c_core/i2c_core.cst
i2c_core/chips/i2c_core/i2c_core.rpt
i2c_core/chips/i2c_core/i2c_core.ws
i2c_core/chips/i2c_core-optimized/i2c_core-optimized.cst
i2c_core/chips/i2c_core-optimized/i2c_core-optimized.rpt
i2c_core/chips/i2c_core-optimized/i2c_core-optimized.ws
i2c_core/files/L0.rpt
i2c_core/files/L1.rpt
i2c_core/files/L2.rpt
i2c_core/i2c_core.exp
i2c_core/workdirs/unisim/Anal.info
i2c_core/workdirs/unisim/Anal.out
i2c_core/workdirs/unisim/VCOMPONENTS.sim
i2c_core/workdirs/unisim/VCOMPONENTS.syn
i2c_core/workdirs/Virtex2_macro/Anal.info
i2c_core/workdirs/Virtex2_macro/Anal.out
i2c_core/workdirs/Virtex2_macro/COMPONENTS.sim
i2c_core/workdirs/Virtex2_macro/COMPONENTS.syn
i2c_core/workdirs/WORK/Anal.info
i2c_core/workdirs/WORK/Anal.out
i2c_core/workdirs/WORK/i2c_core.hnl
i2c_core/workdirs/WORK/I2C_CORE.mra
i2c_core/workdirs/WORK/i2c_core.out
i2c_core/workdirs/WORK/I2C_CORE.sim
i2c_core/workdirs/WORK/i2c_core.sts
i2c_core/workdirs/WORK/I2C_CORE.syn
i2c_core/workdirs/WORK/I2C_CORE__STRUCTURAL.sim
i2c_core/workdirs/WORK/I2C_CORE__STRUCTURAL.syn
i2c_core/workdirs/WORK/SIMPLE_I2C.mra
i2c_core/workdirs/WORK/SIMPLE_I2C.sim
i2c_core/workdirs/WORK/SIMPLE_I2C.syn
i2c_core/workdirs/WORK/SIMPLE_I2C__STRUCTURAL.sim
i2c_core/workdirs/WORK/SIMPLE_I2C__STRUCTURAL.syn
i2c_core/chips/i2c_core
i2c_core/chips/i2c_core-optimized
i2c_core/workdirs/unisim
i2c_core/workdirs/Virtex2_macro
i2c_core/workdirs/WORK
i2c_core/chips
i2c_core/files
i2c_core/workdirs
i2c_core