文件名称:ieep1.4
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10-b binary-weighted D/A converter based on
current division is presented. The effective resolution bandwidth
is 5 MHz at a maximum clock frequency of 40 MHz. The circuit
is integrated in a 0.8-pm double-metal CMOS technology and
the chip area is 0.4 mm’.
current division is presented. The effective resolution bandwidth
is 5 MHz at a maximum clock frequency of 40 MHz. The circuit
is integrated in a 0.8-pm double-metal CMOS technology and
the chip area is 0.4 mm’.
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ieep1.4.pdf
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