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simulation
- 对数字电路,通信原理,DSP等一些现象的仿真:比如整流器,滤波器,仿真二/四译码器,四选一数字选择器,信号发生器,2FSK信号的调制、滤波、频谱分析等,对DSP中各种滤波的仿真以及通原中的调制解调的仿真等-Digital circuits, communication theory, DSP and some other phenomena simulation: for example, rectifiers, filters, simulation II/IV decoder, four e
generator
- 信号发生器,用来产生输入的所要求的相应的信号并输出该信号。-Signal generator, used to generate the required input and output signals corresponding to the signal.
System_Generator_Pro
- 采用SystemGenerator实现信号发生器-achieve signal source with SystemGenerator
DDS
- Verilog语言实现基于DDS技术的余弦信号发生器,输出位宽16Bit-Verilog language technology based on the cosine DDS signal generator, the output bit width 16Bit
DSPAMb
- 利用Matlab/DSP Builder 建立AM信号发生器模型。-Matlab/DSP Builder
CPLD_based_design
- 基于CPLD的多功能信号发生器设计,是一本很好的CPLD的书籍-CPLD-based design of multi-function signal generator
EDA3
- 实验目的 1.学习一般有限状态机的设计; 2.实现串行序列的设计。 二、设计要求 1. 先设计0111010011011010序列信号发生器; 2. 再设计一个序列信号检测器,若系统检测到串行序列11010则输出为“1”,否则输出为“0”,并对其进行仿真和硬件测试。 -Purpose of the experiment 1. Learning the general design of finite state machine 2. Serial sequence de
cos
- 余弦波生成C语言代码,用于信号发生器设计中。-this is a function of cos singnl.
AD9854
- 基于DDS芯片AD9854的信号发生器设计-AD9854 DDS chip, based on the Signal Generator
22222222222
- 地址线为8位,数据线为八位的正弦信号发生器,采用文本原理图混合输入的方法。-8-bit address lines, data lines for the eight sinusoidal signal generator, using the text input method for mixed schematic.
4-10-VHDL-f1
- 四位10进制VHDL频率计设计说明 四位频率计的结构包括一个测频率控制信号发生器、四个十进制计数器和一个十六位锁存器(本例中所测频率超过测频范围时有警示灯)。-Four 10-digit frequency counter VHDL design descr iption of the structure of the four frequency meter includes a measuring frequency control signal generator, four deci
danpainji
- 基于AT89c52单片机的几个汇编程序及其仿真 1流水灯 2脉冲计数 3基于DAC0832的单片机模拟DDS低频信号发生器 4基于DAC0832的单片机模拟DDS低频信号发生器 5频率周期测量 6密码锁-Microcontroller based AT89c52 assembler and simulation of several light water 2 1 3 pulse count DAC0832 microcontroller-based low-freque
Trianglewavesignalgenerator
- 三角波信号发生器论文,1信号峰值在0~5V之间可调,分辨率为0.5V。 2按键可选择峰值和频率。 3显示器可显示峰值和频率。 4设计电源电路,信号发生器电源采用AC220V 5写出程序流程图及汇编程序。 -Triangular wave signal generator paper, a signal peak in adjustable between 0 ~ 5V, a resolution of 0.5V. 2 button to select the peak and
ddsforsinandcos
- 利用VerilogHDL调用MATLAB产生的数据实现基于DDS技术的正余弦信号发生器,输出位宽为16。-Using the data generated VerilogHDL call MATLAB implementation is based on DDS technology cosine signal generator, the output is 16 bits wide.
TMS320VC5402_DSP
- 这篇文章主要介绍了基于TMS320VC5402 DSP的信号发生器的设计情况。这是一个以DSP为核心来实现信号发生器的系统,该系统具有结构简单灵活,抗干扰能力强、产生频率较高、应用广泛等特点。-This article introduces the signal generator based on TMS320VC5402 DSP design situation. This is a DSP core to achieve the signal generator system, the s
10BitDAxinhaofsqi
- 基于51单片机的编程-10位DA信号发生器,非常合适初学习者,在实际测试过-Based on 51-bit microcontroller programming-10 DA signal generator, a very appropriate first learners tested in practice
001
- 课程设计时,学长给的函数信号发生器资料,可以小小借鉴一下-Curriculum design, the seniors information to function signal generator
boxingfashengqi
- 波形发生器一种数据信号发生器,在调试硬件时,常常需要加入一些信号,以观察电路工作是否正常-A data signal generator, waveform generator, in the debugging of hardware, it is often necessary to add some signal to observe the circuit is working properly
VGA
- VGA彩条信号发生器,使用Verilog编写-VGA color bar generator, written using the Verilog
DDS
- 基于单片机的DDS正弦信号发生器设计代码,包括DDS代码,液晶显示器代码-Microcontroller-based design of DDS sine wave generator code, including the DDS code, LCD code