搜索资源列表
clock
- 多功能数字钟:正常显示时分秒,设置调整时间,秒表,闹钟-Multifunctional digital clock: normal display, minutes and seconds, set to adjust the time, stopwatch, alarm clock
CPLD-digital-clock-design
- 基于CPLD实验板的多功能数字钟设计,运用VHDL编写程序-Multifunction digital clock design based on CPLD experimental board, the use of VHDL programming
51-1602-clock
- 基于51单片机的多功能数字钟 1602显示-Based on 51 MCU 1602 multifunction digital clock display
sz
- 一个24小时制多功能数字钟。通过该数字钟可以显示小时、分钟、有AM、PM指示器,具有时间设置(小时和分钟)、闹钟时间设置、闹钟开、闹钟关功能。通过温度传感器检测环境温度,并显示当前环境温度信息。-A 24-hour clock multifunction digital clock. Through the digital clock display hours, minutes, AM, PM indicator, with a time setting (hours and minutes)
Digital_clock11
- 基于FPGA芯片设计多功能数字钟,具有任意时刻定时闹钟,有分频器,计数器,等等模块构成-Regular alarm clock based on the FPGA chip design multifunction digital clock, any time, divider, counter modules
PIC16F877A-digital-clock-design
- 基于PIC16F877A的多功能数字钟设计,运用C语言设计程序-Use of the C language design program based on the design of multi-functional digital clock PIC16F877A
digital-clock-design
- 多功能数字钟,利用quarter2进行设计-digital clock design
duogongnengshuzizhong
- 基于Max+plus2软件的Verilog VHDL语言的数码管显示多功能数字钟-Multifunctional digital clock digital tube based on Max+plus2 software Verilog VHDL language
pailiezuhe
- 基于fpga的多功能数字钟,并且用1602显示,24小时,可调时,分,秒-Fpga-based multi-function digital clock, and with the 1602 show, 24 hours, adjustable hours, minutes, seconds
clock
- 用 Verilog HDL 设计一个多功能数字钟,包含以下主要功能: 1) 计时,时间以 24 小时制显示; 2) 校时; 3) 闹钟:设定闹钟时间,可利用 LED 闪烁作为闹钟提示; 4) 跑表:启动、停止; 5) 其他。-Using Verilog HDL design a multi-functional digital clock contains the following main functions: 1) time, the time is displayed
multiclock
- 以VHDL为基础的多功能数字钟的实现功能程序,包括时钟,闹钟,计数等功能。-In VHDL-based implementation of multi-function digital clock procedures, including clock, alarm clock, counting and other functions.
alarm
- VHDL,多功能数字钟:具有年、月、日、时、分、秒计数显示功能,以24小时循环计数;具有整点报时功能;可以对年、月、日、时、分及秒进行单独校对,使其校正到标准时间-VHDL, multifunction digital clock: a year, month, day, hour, minute, seconds count display features a 24-hour cycle The whole point timekeeping function possible for
fpga
- 多功能数字钟,具有年月日时分秒功能,同时能校时,1个八段数码管显示-Multifunctional digital clock with date, hour function, and can school, an eight digital tube display
CLOCK1
- 基于89S52的多功能数字钟汇编源码,内有注释,适合单片机初学者参考阅读-89S52-based multifunctional digital clock assembler source code, there are notes, suitable for beginners SCM reference reading
clockend
- 基于QuartusII开发环境,Cyclone III开发板的VerilogHDL多功能数字钟程序。可实现24小时计时,手动校时,闹钟,整点报时功能。分频模块在仿真和烧写是需要改变。-QuartusII based development environment, Cyclone III development board VerilogHDL multifunction digital clock procedures. Can achieve 24-hour clock, manual ti
dgnszsz
- 多功能数字钟,在quartusII软件平台上实现的verilog源代码。大家试试看。-Multifunctional digital clock in quartusII software platform to achieve the verilog source code. We try.
muti-function-clock
- 用来实现多功能数字钟,可调节闹钟铃声和数码管显示-muti-function digital clock verilog code
shixunlaozhong
- 基于Verilog HDL语言的多功能数字钟,能够实现置位和清零功能。 -Verilog HDL language-based multi-function digital clock, to achieve set and clear functions.
duogongnengshuzizhong
- 南京工程学院 数电课程设计 多功能数字钟 电路图 所有实验文件打包.zip包括做实验的所有文件打包给大家啦,MAX+plus II设计电路图,gdf文件,mod文件,报告书,一切齐全啦,当时被评为优秀成绩的,特别推荐给大家,电路绝对优秀,直接上机操作,导入电路图即可验证演示。-Number of Nanjing Institute of Electrical curriculum design electronic locks files packaged all experiments, in
Digital_Clock1
- 基于Basys2多功能数字钟 verilog HDL 完整工程文件-Based Basys2 multifunction digital clock verilog HDL complete project file