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pinluji.rar
- 四位十进制频率计设计 包含测频控制器(TESTCTL),4位锁存器(REG4B),十进制计数器(CNT10)的原程序(vhd),波形文件(wmf ),包装后的元件(bsf)。顶层原理图文件(Block1.bdf)和波形。 ,Four decimal frequency meter measuring frequency controller design includes (TESTCTL), 4 bit latch (REG4B), decimal counter (CNT10) of t
pinglvji
- 做的等精度频率计,采用等精度测量原理,即利用双计数器“相关计数”和“硬件同步分频”实现高低频率的等精度的测量。用FPGA实现频率测量、周期测量、时间间隔测量、相位测量及脉冲宽度的测量。所有的测量功能都由VHDL语言编程实现。-I do other precision frequency meter, use and other precision measuring principle, namely the use of dual-counter " related counts&qu
FPGA--cepin
- 几个关于用vhdl 语言,编写测频,频率计程序的论文,希望对初学者有用!-Vhdl on the use of several languages, write frequency measurement, frequency meter program of papers, I hope useful for beginners!
4weishuzipinlvjikongzhimokuai
- Verilog HDL下的4 位数字频率计控制模块源代码-Verilog HDL under four digital frequency meter control module source code
shiyan6
- 一个8位的十进制频率计数器,功能经过测试.-An 8-bit decimal frequency counter, function tested.
fangzhen
- vhdl代码: 采用等精度测频原理的频率计程序与仿真!初学fpga者可以参考参考!!比较简单-VHDL code: Using the principle of frequency measurement accuracy, such as the frequency of procedures and simulation! FPGA beginner who can refer to reference! ! Relatively simple
plj
- 基于VHDL的简易数字频率计,具体功能不清楚请大家验证! -Simple VHDL-based digital frequency meter, the specific function is not clear please verify!
freq
- vhdl语言设计频率计,十进制加法器.运用maxplus2运行,-VHDL language design frequency, the decimal adder. maxplus2 application running,
chengxu
- 关于频率计程序的设计,LCD控制程序,PSK调制解调的控制程序,MSK调制解调控制程序,电梯控制程序,TLC5510控制程序,基带码发生器程序,电子琴程序,自动售货机程序,电子时钟程序,步进电机控制定位系统,波形发生器,出租车计价器,ADCO809-Procedures regarding the design of frequency meter, LCD control procedures, PSK modulation and demodulation of the control pr
frenquenter
- 等精度频率计设计与文档,有源码,doc格式-Precision frequency meter, etc. The design and documentation, has source code, doc format
edaplj
- 这个是我做的频率计,代码都是正确的,大家共享一下了。-This is the frequency of me to do, the code is correct, we share about the whole thing.
last
- 本程序完整的实现了数字频率计的常用功能。并对通常数字频率计的常见问题进行了改进。具有实用价值。-Complete the implementation process of the digital frequency of commonly used functions.
VHDL
- 在电子技术中,频率是最基本的参数之一,又与许多电参量的测量方案、测量结果都有十分密切的关系,因此频率的测量就显得更为重要。测量频率的方法有多种,其中电子计数器测量频率具有精度高、使用方便、测量迅速,以及便于实现测量过程自动化等优点,是频率测量的重要手段之一。在本次毕业设计中我们选择使用单片机来制作数字频率计,并在实际制作中采用了直接测频法。利用延时产生的时基门控信号来控制闸门,通过在单位时间内计数器记录下的脉冲个数计算出输入信号的频率,最终送入LCD中显示。这样制作出来的频率计不仅可以满足设计题
plj6
- 基于vhdl 的数字频率计的设计源程序及工程文件,已在实验箱上实现-vhdl,pinlvji
FPGA
- 基于FPGA的数字频率计的设计11利用VHDL 硬件描述语言设计,并在EDA(电子设计自动化) 工具的帮助下,用大规模可编程逻辑器件(FPGA/ CPLD) 实现数字频率计的设计原理及相关程序-FPGA-based design of digital frequency meter 11, the use of VHDL hardware descr iption language design, and EDA (electronic design automation) tools with
pinlvji
- 等精度频率计设计,很好的源代码,附上工程文件,在quartus5.0以上版本即可运行。-Design accuracy, such as frequency meter, a good source code, attached to the project document, in the above quartus5.0 to run.
etester_zcx1002
- 这是一个等精度频率计的VHDL源程序,里面有QuartusII的完整工程文件。-This is a precision frequency meter, such as the VHDL source code, which has a complete project file QuartusII.
E_8051_FTEST_K4X4_new
- 是带51单片机核的等精度频率计的FPGA设计的部分。用VHDL编的,也有VERILOG的。-51 is a single chip with precision, such as the nucleus of the frequency of some of FPGA design. VHDL for use as well as the VERILOG.
FRE
- 用1602显示的等精度频率计,有多种功能的;可能测试占空比和周期的-vhdl
dds_vhdl
- fpga VHDL语言,控制DDS产生频率可变的正弦波信号扫频-FPGA VHDL DDS