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ALU_ise10migration
- It s vhdl source code for 32 bit ALU.
07302529
- 计算机组成原理实验（MAX PLUS） 1.ALU设计 2.MEM设计 3.32位2选1选择器-Principles of Computer Organization Experiment (MAX PLUS) 1.ALU design 2.MEM design 3.32 2 election 1 selector
ALU
- ALU加法器的设计，实现带进位的加法运算！-ALU adder design, the realization of the adder into the bit computing!
4BIT_ALU
- this program performs the functonality of 4 bit alu
8risc
- 8位RISC CPU,包括alu,count,machine-8 bit risc cpu
4_Bit_Alu_vhdl
- Complete VHDL Code for a 4 BIT ALU PROJECT
spartan_alu_8_bit
- Verilog based 8 bit ALU module, implemented on Spartan 3E FPGA.
Alu1232
- An 8-bit ALU with 16 operations: logic, arithmetic, shifts.
cpu16
- 实现一个16位CPU。该CPU使用精减指令集，是一个五段流水线的结构。包括取指令(IF)、读寄存器(RD)、运算器(ALU)、内存读写(MEM)和写回(WB)。-The realization of a 16-bit CPU. Streamline the use of the CPU instruction set is a structure of five lines. Including fetch (IF), register read (RD), arithmetic logic u
Alu_Solution
- Solution for 16bit ALU component in vhdl.
CPU
- Simple 8 bit ALU which subs, adds, ands, ors, nots, ...
2bit_ALU
- This is a source code of 2 bit ALU and this is in VHDL form.-This is a source code of 2 bit ALU and this is in VHDL form.
4ALU
- The project is used to perform the operation of 4 bit arethmatic and logical operation. the projcet is implemented in spartan 3E
alu_final
- This a program which performs addition,subtraction,multiplication and division of two 4 bit binary numbers..therefore it is called as 4 bit binary ALU..if u have any doubt,then mail me at prem_bombay@yahoo.co.in -This is a program which performs addi
alu_32_bit
- 一个Verilog语言写的３２位ＡＬＵ的源码。-A language written in Verilog source code for a 32-bit ALU.
ALU_32
- 32 bit ALU design,LU Operations: This input specifies the ALU operation to be used during the acquisition process. The ALU operations are divided into logical operations and two classes of arithmetic operations. The two classes of arithmetic operatio
ALUALUcontrol
- 实现32位的ALU，使其能够支持基本的指令。用Verilog HDL语言或VHDL语言来编写，实现ALU及ALU控制器。 -To achieve 32-bit ALU, so that it can support the basic directives. With the Verilog HDL language or VHDL language to write, implement ALU and the ALU controller.
4
- simple code based on verilog shifter , cla ,clg , ALU , PC
VHDLmipsPipeline
- 32 位MIP流水线CPU设计，5 stage，代码详细，包括ALU,存储器,寄存器等，是个很不错的CPU设计-32 MIP pipelined CPU design, 5 stage, the code in detail, including the ALU, memory, registers, etc. is a very good CPU design
alu
- This arithmetic logic unit accepts 8-bit inputs, but it can easily be modded to higher bits. It supports the addition, subtraction, set if less than, AND, and OR operations. The operation to perform is determined by the 3-bit address bus.