搜索资源列表
usb
- pc与fpga之间的数据传输 在fpga上有一个usb芯片cy68013 用verilog来对usb芯片进行控制-the communication between pc and the fpga，these is a cy68013 on the fpga，which is controled through verilog
fpga-usb-verilog-test
- 红色飓风开发板中USB测试源码部分，包含说明文档，FPGA的verilog代码，cy68013固件程序，上位机测试程序。实现USB回环测试，可作为usb开发的参考文件-Red hurricane development board of the USB test source code, including documentation, FPGA verilog code, cy68013 firmware program, PC test program. Realization of USB
skeleton_bigurb_thread
- 本文件是CY68013在linux下的驱动程序，基于USB框架进行修改，在利用USB 2.0接口的情况下实现24MB/S的速度-This document is CY68013 under linux drivers, to be modified USB-based framework to achieve the speed of 24MB/S in the case of using USB 2.0 interface
CY7C6801
- 是一个很珍贵的CY68013中文开发文档，里边讲了关于固件开发的详细过程和代码-Is a very precious CY68013 Chinese developer documentation, talk about the inside details of firmware development process and code
CYAPI
- cy68013芯片的C控制API,方便编程应用-CY68013 chip C API
cy68013-DRIVER-FOR-WIN8-6BIT
- cy68013WIN8 64位驱动（已测试） 需要禁用数字签名。由FX2LP18评估板驱动修改INF文件得来-cy68013WIN8 64-bit drivers (have been tested) You need to disable the digital signature. Evaluation Kit driven by the FX2LP18 modify INF file come
Xilinx
- 基于FPGA实现的USB模块CY68013的数据读写，包含了固件-Based on FPGA USB module CY68013 read and write data, including firmware
led
- Cy68013的花式流水灯，Keil C工程
sramf
- 简单的verilog程序，完成sram读写，CY68013开发板的原理图和PCB档。(array to simulate SRAM wire [(dqbits - 1) : 0] memprobe = {bank1[A], bank0[A]};)
fifo_FPGA
- 68013 FIFO 接口程序，USB开发、VHDL开发(68013 FIFO USB VHDL FPGA)
VERILOG_USB2.0源代码
- 基于verilog针对CY68013开发的USB通信程序(USB communication program based on Verilog for CY68013 development)