搜索资源列表
ethnet
- 利用ALTERA公司Cyclone II 2C35 fpga芯片，实现以太网通信。以太网芯片为DM9000A
yuyin
- 在FPGA上实现声卡接口，电子琴，滤波比较器，最终实现语音通信
costas环资料
- 基于FPGA的全数字Costas环的设计与实现.caj 数字COSTAS环的原理与设计.kdh 一种改进的载波同步Costas环路设计及实现.caj 一种适合高速数字通信的并行Costas环结构.caj
castos载波同步算法的MATLAB实现
- %科斯塔斯环载波同步算法的MATLAB实现 %假设实际发送信号的载波频率为3.563MHz,本地初始频率为3.568MHz，利用科斯塔斯环法实现载波同步。 %利用本地初始频率以及科斯塔斯环，经过多次迭代后，使最后获得的载波频率趋近于实际发送信号的载波频率。 %《无线通信的MATLAB和FPGA实现》P317
wishbone_VHDL.rar
- wishbone总线的VHDL源代码 wishbone适用于与FPGA中IP核的高速通信，其接口简单，速度快 成为ip通信的主流,Wishbone Bus VHDL source code Wishbone applicable to IP core in FPGA high-speed communications, and its easy interface, fast becoming the mainstream of ip communications
IGLOO_Icicle_LCPS_SS.rar
- Actel 的高速USB接口下载版电路原理图。USB2.0+FPGA。想做个所USB接口通信的可以参考。,Actel IGLOO_Icicle scematics.
lattice-FPGAHDMI-
- 实现FPGA与hdmi通信非常有用的开发文档-a perfect doc for develope application between FPGA and HDMI
altclklock0
- 用fpga进行串行通信，内部附用锁相环进行控制传送和接受-Fpga using serial communication with the internal phase-locked loop with send and receiving control
canbus
- 实现CAN总线的通信，并通过测试验证，用verilog在FPGA上实现-CAN bus communication, and tested to verify that, in the FPGA using verilog
DDDC
- 采用FPGA中的Verilog编程语言实现无线通信中数字上变频的功能-Using the FPGA Verilog programming language on the conversion of digital wireless communication function
uart.rar
- 基于vhdl的串口通信模块，即异步收发机，可实现单片机核fpga的收发串口通信，遵从rs232协议，已经调试过，很不错的资源,Vhdl-based serial communication module, that is, asynchronous transceiver can achieve single-chip transceiver nuclear fpga serial communication, rs232 to comply with the agreement, has be
IIC_VHDL
- I2C总线的FPGA描述，基于FPGA平台的两线制串行通信协议的硬件模拟，采用VHDL语言描述。-Inter Integrated Circuit in VHDL
USB2UART
- usb串口通信的固件程序与FPGA控制程序-usb serial communication firmware and FPGA control program
CY7C68013_DEMO
- cy7c68013原理图和程序 实现fpga和68013通信程序代码-Cy7c68013 principle chart and procedures To realize the fpga and 68013 communication program code
UART
- 利用FPGA接受232芯片的串口数据，可以与PC进行串口通信-FPGA chip using the serial data received 232, serial communication with PC
rec
- 基于vhdl编写的FPGA与PC串行通信的接收信号解码程序，调试已通过。-Vhdl prepared based on FPGA and PC serial communication received signal decoding process, debugging has been passed.
uart_1
- 基于VHDL的FPGA串口通讯程序，能够实现FPGA串口通信-VHDL for FPGA-based serial communication programs that enable FPGA serial communication
code
- 《无线通信FPGA设计》书里的matlab和verilog代码-the matlab and verilog code in 《Wireless Communications FPGA design》
uart
- 利用串口调试助手是实现pc机和fpga的串口通信功能，程序附注释。-Debug Assistant is achieved using serial pc machine and fpga serial communication function, the program annotated.