搜索资源列表
i2c_bus
- i2c总线控制器的verilog的实现，编译环境quartus-i2c bus controller verilog implementation, build environment quartusII
ex9
- 一个I2C通信协议的verilog代码，开发环境是Quartus 2,产生结果在数码管上显示-I2C communication protocol of a verilog code, development environment is Quartus 2, produce the results shown in the digital control
eeprom_wr
- 本程序是quartus.exe 环境下经过编辑和仿真之后的eeprom中的i2C 通讯协议的驱动程序-This program is quartus.exe edited and simulation environment after the eeprom in the protocol driver i2C
I2C_bus
- 对I2C总线的简单操作,利用VHDL语言编写，在Quartus 8.1环境下测试通过，可以建立波形文件做仿真实验-very simple code foe I2C bus operation
I2Cread-and-write-the-language
- 用Altera Quartus II 的VHDL语言完成的I2C读写数码管显示源代码-Altera Quartus II VHDL with the completion of the I2C read and write the language digital display source code
i2c_ctrl
- 程序是用VHDL语言在quartus开发环境中实现的I2C通信的源代码-VHDL language program is the development environment in quartus I2C communication to achieve the source code
quartus_IPcore
- 这15个Quartus的ip核里面有AVR，I2C，sdram，arm，usb，PCI等ipcoure，相信用过ipcore的人都知道这个的重要性，尤其是在NIOS嵌入硬件以提高速度的时候，这些事非常有用的。毕竟这些事人家封装起来的，肯定比自己去编好吧，献给用Quartus的好盆友，希望对你们有用。-free ipcoure
qcomponentsu
- quartus的几个IP核（PWWM,RAM,I2C） -quartus several IP cores (PWWM, RAM, I2C)
I2C_EEPROM
- 1. 本测试是夏宇闻 verilog数字系统设计教程，中的例程。 2. 编译环境Quartusii 3. 仿真环境Modelsim se 6.5d 4. 可综合部分已经经过quartus 验证正确 5. 仿真部分通过将I2C模块与一个EEPROM模型组合，通过时序仿真-EEPROM_I2C Verilog
I2C_i2c
- fpga例程：用fpga实现i2c串口通讯的vhdl详细代码，完整的quartus工程，可直接用-fpga routines: i2c serial communication with fpga implementation details of vhdl code, complete quartus project, can be directly used
i2c_master
- This details an I2C master component for single master buses, written in VHDL for use in CPLDs and FPGAs. The component reads and writes to user logic over a parallel interface. It was designed using Quartus II, version 11.1. -This details an I2C mas