搜索资源列表
bit-Multiplexer
- 1 bit Multiplexer:A multiplexer (MUX in short) is an electronic switch that allows you to connect selectively (based on selection signal S) one of several inputs to an output
mdio-mux
- List of our children linked through their next fields.
exynos4210-pinctrl
- Samsung s Exynos4210 SoC pin-mux and pin-config device tree source.
sun5i-a13
- This a dummy clock, to be used as placeholder on other mux clocks when a specific parent clock is not yet implemented. It should be dropped when the driver is complete. -This is a dummy clock, to be used as placeholder on other mux clocks when a s
sky81452-regulator
- Samsung s Exynos4x12 SoCs pin-mux and pin-config device tree source for Linux v2.13.6.
mdio-mux-gpio
- Legacy compatible property for Linux v2.13.6.
ras
- Add info-> for MUX-layer to route the packet out.
omap
- 34xx mux mode options for each pin. See TRM for options.
pinctrl-single
- mux function register offset and value pair.
i2c-designware
- Provides clock implementations for three different types of clock devices on the Axxia device: PLL clock, a clock divider and a clock mux.
cris_supp_reg
- The mix clock is a clock combined mux and div type clock. Because the div field and mux field need to be set at same time, we can not divide it into 2 types of clock.
fenpin
- 对m序列进行2ASK调制 包含分频器 m序列发生器 正弦信号发生器 二路选择器4个模块-process m sequence with 2Ask includes frequency divider, m sequence generator, sine signal generator and MUX
sitronix-st1232
- This a dummy clock, to be used as placeholder on other mux clocks when a specific parent clock is not yet implemented. It should be dropped when the driver is complete. -This is a dummy clock, to be used as placeholder on other mux clocks when a s
mux
- OMAP_GPIO_MUX_MODE, bits 0-2: gpio muxing mode, same like pad control register which includes values 0-7. -OMAP_GPIO_MUX_MODE, bits 0-2: gpio muxing mode, same like pad control register which includes values 0-7.
Mux-0710
- 多路复用协议gms0710源码，C语言实现-the code of gsm0710 protocol
mux4_1
- 4對1得多工器,使用verilog與法寫成,包含test檔案-4to1 mux
mmcc-msm8960
- Wait at least 6 cycles of slowest clock for the glitch-free MUX to fully switch sources.
test_mux_2_to_1
- Its a test bench for mux 2-to-1
mux8x1
- mux 8x1 in verilog simulated in modesim
SkTextMapStateProc
- Data-types common to the mux and demux libraries.