搜索资源列表
sin
- 这是一个基于vhdl编写的正弦信号发生器,实现的功能为发生正弦波,给dac 0832采样-This is a sine signal generator based on VHDL code, realize the function of sine wave, give dac 0832 samples
DCsources_
- PWM generator written in VHDL, simulation is passed, the basic waveform perfect, can be used for DC motor control
LCD12864
- FPGA实现LCD12864驱动器(内嵌函数信号发生器所需状态机),并行数据传输,VHDL实现。-FPGA realization LCD12864 drive (embedded function generator required state machine), parallel data transmission, VHDL implementation.
FPGA-for-signal
- VHDL非常好的波形发生器资料 -VHDL very good waveform generator Information
ren_gen
- xilinx vhdl code for random number generator and prime number check. it can be used for cryptography
deinterleaver_new
- fpga implementation of wimax deinterleaver address generator using vhdl cod
log_generator
- log10 generator in vhdl. simulated in Modelsim
sign_square
- square wave form generator for vhdl
vedio_format
- 本代码是bt1120 格式产生以及转换为rgb源代码,开发环境为vhdl。-this code describe the bt1120 generator and change form soure code.
ahb_system_generator_latest.tar
- AHB system generator. This file is a part of a system generator for AHB system. it is VHDL code for the AMBA arbiter.
generateur_rossel
- this is vhdl program of rosseler chaotic generator 32 bit fixed point.
M_generation
- 伪随机序列发生器,即M序列发生器,VHDL语言完成,已仿真通过。-Pseudo-random sequence generator, VHDL language completed, through simulation.
boxingfashengqi
- 波形发生器的源代码,有正弦波,三角波,锯齿波,方波。modelsim仿真,包含testbench仿真代码,testbench用的verilog编写,波形发生器源代码用的VHDL编写。-Waveform generator source code, sine, triangle, sawtooth, square wave. modelsim simulation, testbench simulation code contains, verilog write testbench use, w
VHDLquartusmodelsim
- 内容有VHDL语法总结及相应的实例应用,每个程序我都亲自试过,特别适合初学VHDL的同学们。常用的程序有 设计一个M序列发生器,M序列为“11110101”、 设计一个彩灯控制器,彩灯共有16个,每次顺序点亮相邻的四个彩灯,如此循环执行,循环的方向可以控制。设计一个跑马灯控制器。一共有8个彩灯,编号为LED0~LED7,点亮方式为:先从左往右顺序点亮,然后从右往左,如此循环往复等等。这些都是我在考试前熬夜总结的,很有用。如果配合开发板用的话,那就更好了- VHDL syntax summary
CCD_frequency_generator
- CCD工业相机六路频率发生器,VHDL语言实现,非Verilog HDL-CCD industrial camera image capture six-way frequency generator, VHDL language, non Verilog HDL.
nco-cos
- 余弦波发生器,利用vhdl仿真软件可以产生余弦波图像-Cosine wave generator, the use of VHDL simulation software can generate cosine wave images
vhdl_CRC_generatir
- CRC 產生器,VHDL 語言, 適合 FPGA 練習使用-CRC generator , VHDL language, Good for FPGA learnning
15010120041_高瑞雪_lab2
- 在本实验中,将使用System Generator for DSP创建一个带乘法器和累加器的12-bit x 8-bit MAC(Multiplier Accumulator),并使用System Generator 的Resource Estimator块来估计资源利用率。 在仿真Simulink中的设计之后,将从该设计中生成VHDL代码和内核,并在Xilinx ISE Foundation开发软件中实现MAC。(Design, construct and verify the specifi
epm240_example
- VHDL代码,共10个程序,分别是1分频器2状态机3计数器4拨码开关对应数码管显示5键盘及显示6键盘显示7交通灯8汉字滚动9ADC0804直流采样和显示10正弦波发生器(A total of 10 procedures, namely, 1 frequency dividers, 2 state machines, 3 counters, 4 dial switches, corresponding to digital tube display 5 keyboard and display 6
kebenchengxu
- VHDL代码,一些课本的小程序。包含3线-8线译码器,4选1选择器,6层电梯,8线-3线编码器,8线-3线优先编码器,8选1,BCD-7段显示译码器真值表,半加器,摩尔状态机,数字频率计,数字时钟,同步计数器,序列检测器的设计,序列信号发生器,一般状态机等等。(The small program of some textbooks. Includes 3 -8 decoder, 4 1 selector, 6 elevator, line 8 Line 8 line -3 encoder, -3