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altera-uart
- ALTERA UART sopc 软核的VHDL描述-ALTERA UART VHDL DESCRIBE
UART
- IM DESINING VHDL COD EIN IS THIS CODE IS GOD AND TESTIN VERY GOOD
uart
- uart的vhdl源码，实现fpga的通用串行异步收发接口的设计-the uart the vhdl source to achieve fpga universal serial asynchronous transceiver interface design
uart
- 用VHDL实现UART通讯（暂时只能发送）-UART communication using VHDL (temporarily only send)
uart-vhdl
- 不错的uart总线程序，已经测试过，没有问题啊-Good uart bus program, has been tested, there is no problem ah
uart
- Code VHDL/Verilog for UART FPGA: Xilinx, Altera-Code VHDL/Verilog for UART FPGA: Xilinx, Altera...
uart-IP-Core
- 串口的FPGA VHDL的IP核 可以直接调用使用-Serial FPGA VHDL IP core can be called directly use
uart
- uart串口通讯，波特率任意可调，采用vhdl语言编写，ise和quartus均可使用-uart serial communication baud rate of any adjustable
VHDL
- 自己写的串口程序，其中接收模块和发送模块分开了，主要对用状态机编写串口协议!-UART TXD，RXD
UART-VHDL-QUARTUS
- uart vhdl quartus for altera
UART-VHDL-design-
- 设计的VHDL串口实例，感觉还不错，可以拿来借鉴和修改啊！-Design VHDL serial instance, I feel pretty good, can be used to draw and modify ah!
Recv
- 运用VHDL语言，实现串口的接收子程序，可以将该子模块加载到主程序中。-VHDL UART RECEIVE
xmtr
- 运用VHDL语言，实现串口的发送子程序，可以将该模块直接套入主程序。-VHDL UART SEND
UART
- UART IN VHDL LANGUAGE IS NOT BEST BUT WORK -UART IN VHDL LANGUAGE IS NOT BEST BUT WORK
UART
- 基于FPGA的串口程序 由VHDL语言编写，通过串口助手实现数据的发送与接收-FPGA-based serial procedures by VHDL language and sending and receiving data through the serial port assistant
1.UART
- 该代码主要实现UART的串行通信，针对的是RS232芯片，同时包含了verilog和VHDL编写的程序-The code UART serial communication, RS232 chip, also contains a program written in verilog and VHDL
UART
- design IP UART by Verilog, VHDL-design IP UART by Verilog, VHDL...
uart
- 利用VHDL进行嵌入式设计编程，FPGA与电脑进行串口通信程序-Using VHDL programming embedded design, FPGA and computer serial communication program
UART
- 本人觉得还不错的vhdl写的UART程序，验证过。-I feel pretty good vhdl write UART program verified.
uart
- uart source code using vhdl