搜索资源列表
MPMC_NPI
- 这是MPMC的NPI接口的,字节读操作的例子-xilinx mpmc core, npi interface example
sfifo_srl
- 针对XILINX FPGA特有的SRLC16E器件,实现的同期FIFO. 特点:宽度深度可配置,面积小。-SRLC16E Based Synthesise FIFO Implement by Xilinx FPGA. The Size is small and FIFO Width, Length can be configured.
ddr2_hamdec64
- VHDL实现的64bit海明码解码模块。 可适用于 Xilinx FPGA, Altera FPGA。-VHDL Implement 64bit Hamming Code (decode)
ml310_base_linux_kernel_config
- xilinx FPGA,可用于xupv2p开发板的嵌入式Linux内核配置文件-Linux xupv2p
filter
- 这是基于MATLAB下的XILINX的FPGA的FIR滤波器的模型设计文件-This is a MATLAB-based FPGA of the XILINX Model of the FIR filter design documents
BGA1
- 本应用指南针对 FT256 1 mm BGA 封装的 Spartan™ -3E FPGA,讨论了低成本、四至六层、 大批量印刷电路板 (PCB) 的布局问题,同时探讨高速信号和信号完整性 (SI) 因素对低层数 PCB 布局的影响。-Application Guide for the FT256 1 mm BGA package, Spartan ™-3E FPGA, the discussion of the low-cost, four to six, high-
Xilinx_constraints.pdf
- detail timing constraint for Xilinx FPGA design
Exp1-Led
- 本次实验使用 Xilinx FPGA的开发工具 ISE6.x,新建一个工程,并进行综合、布局布线、 下载配置。 这里建立的工程是使用 Create-SOPCMB上的发光二极管显示一个八位二进制计数器, 发光二极管亮表示该位为 0。 -Experimental use of the Xilinx FPGA development tools ISE6.x, create a new project, and comprehensive, the layout of wiring, d
xapp460
- xilinx hdmi tx rx verilog code
xapp856
- 基于FPGA的SFI接口实现(VHDL,Verilog and doc)-SFI-4.1 16-Channel SDR Interface with Bus Alignment
counter
- 适用于FPGA Xilinx开发板的Counter程序,计数从0到9999,在板上用4位7段数码管显示,可实现双向计数。-Applicable to FPGA Xilinx development board of the Counter procedures, counting from 0 to 9999, in the board with four 7 digital display, enabling two-way counts.
multiplexer
- multiplexer xilinx FPGA
Xilinx_ISE_9.2i_Software_Manuals
- Xilinx公司的FPGA的专用编程软件ISE的软件详细使用手册-Xilinx' s FPGA-programming software-specific details of the use of ISE software manuals
clock_generator_0_wrapper
- 赛灵思FPGA开发板上时钟源的VHDL源代码,可作为硬件设计参考资料!-Xilinx FPGA development board clock source of the VHDL source code, hardware design can be used as reference!
debug_module_wrapper
- 赛灵思FPGA开发板上调试模块的VHDL源代码,可作为硬件设计参考资料!-Xilinx FPGA development board debug module' s VHDL source code, hardware design can be used as reference!
bram_block_0_wrapper
- 赛灵思FPGA开发板上BRAM模块VHDL源代码,可作为硬件设计参考资料!-Xilinx FPGA development board BRAM module VHDL source code, hardware design can be used as reference!
xapp058
- xilinx Spartan-3E FPGA的MCU配置源代码-xilinx Spartan-3E FPGA to configure the source code of the MCU
core_licenses_full
- 这个是XILINX公司FPGA的aurora,IP授权!!完全好用!-This is the XILINX' s FPGA-aurora, IP licensing! ! Totally easy to use!
Vme_Interface
- 这是本人设计的一个关于VME总线接口的FGPA程序,FPGA一边连接ARM LPC2294,一边连接VME总线,FPGA采用的XILINX公司的SPARTANII系列,程序包包含完整的工程文件-This is my design of a VME bus interface on the FGPA procedures, FPGA side of the connection ARM LPC2294, while connecting VME bus, FPGA using the XILINX
TechXclusives-GetSmartAboutReset
- Xilinx FPGA reset usage