搜索资源列表
FPGA设计xilinx篇
- 华为fgpa内部设计资料
Xilinx_Design_Suite_10.1_深入辅导资料
- 该文档深入讲解了Xilinx的FPGA调试软件ISE10.1的操作，书中有非常多的实例，适合于深入研究Xilinx的FPGA的开发人员。
readback_crc.7z
- FPGA回读CRC功能,下载FPGA之后如果要检验CRC是否正确，可以使用这个功能，属于XILINX的PRIMITIVE原语，使用非常方便-FPGA readback CRC
SPI3_8bit
- 一整套通用的用Verilog代码实现的SPI3接口（8bit接口）协议代码，包含ISE工程文件，本代码在Xilinx公司的FPGA上实现，并且有Modelsim仿真的源文件-SPI3 verilog code（including ISE project and modelsim code)
xapp1014
- Xilinx 音视频设计文档，包括参考设计说明，适合FPGA工程师参考-Xapp1014- Advanced FPGA Design- audio video connectivity.pdf
hardh264
- 一个硬件H264编码的VHDL源码，用于FPGA开发，适合IP摄像头等视频设备输出数据的编码。用Xilinx工具测试过，但代码不只是用于Xilinx。-A hardware h264 video encoder written in VHDL suited to IP cameras and megapixel cameras. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools
VGA
- 基于Xilinx SPARTAN-3E开发板 的VGA实验代码，VHDL编写，非常适合初学者学习FPGA实现VGA控制-Based on Xilinx SPARTAN-3E development board VGA test code, VHDL written, very suitable for beginners to learn to achieve VGA control FPGA
all
- 基于FPGA的频率测试器的verilog HDL代码，测试范围1-10MHz，用XILINX公司的ISE软件打开。-Based on FPGA-frequency test the Verilog HDL code, test range 1-10MHz, with XILINX ISE software to open.
Embedded_system_tools_guide
- 在Xilinx的FPGA平台上开发嵌入式系统的工具文档Embedded_system_tools_guide-In Xilinx s FPGA platform development tool for embedded systems documentation Embedded_system_tools_guide
s3esk_rotary_encoder_interface
- Xilix spartan 3E 旋转编码器接口,脉冲方向识别,AB脉冲滤波 Rotary Encoder Interface Demonstrates how to use the rotary encoder portion of the rotary pushbutton switch.-Xilix spartan 3E rotary encoder interface, pulse direction identification, AB pulse filter Ro
RGBtoYCbCr
- 采用FPGA实现色彩空间转换R’G’B’ to Y’CbCr的VHDL和verilog源代码,支持xilinx的各种器件. -FPGA realization of the use of color space conversion RGB to Y CbCr of VHDL and Verilog source code, to support a variety of Xilinx devices.
DesignReuseMethodology
- 本文介绍了在进行FPGA设计，特别是SOC设计时，为了保证顺利移植，重新利用原有程序，而应该注意的一些基本问题和方法，本文由xilinx提供，但对所有的FPGA的使用者都有非常好的借鉴意义。-In this paper, during the FPGA design, especially in SOC design, in order to ensure a smooth transfer, re-use of existing procedures, but should pay atten
my_fsm_vhdl
- How to infer a finite state machine for fpga altera xilinx
srl_test
- how to infer a shift register for fpga altera xilinx
fpga_xilinx
- FPGA内部程序设计培训PDF版, FPGA内部程序设计培训PDF版-fpag develop designer xilinx editon fpag develop designer xilinx editon
READ
- 用于FPGA实现单总线测温电阻DS18b20时序。在xilinx spartan 3中试过。-failed to translate
ISE7.1i_course
- ISE7.1i 中文教程 适合xilinx的FPGA/CPLD用户-Chinese ISE7.1i the xilinx tutorial for FPGA/CPLD users
usb3.0
- USB的VHDL程序通过验证准确无误大家看看 看吧-USB through the VHDL program to verify the accuracy of all look at and see and see
j32
- mini soc fpga 16bit use realy small amount of gates xilinx
basic-fpga-arch-xilinx
- you need book. I need book. We can share. Good luck