搜索资源列表
FPGAspwm
- 在Xilinx公司的Spartan ⅡE系列的XC2S100E pq-208 FPGA芯片上完成PWM波和SPWM波控制信号，控制电力电子器件IGBT和MOSFET构成的斩波、逆变输出电路，实现直流稳压和SPWM交流调频输出。-In Xilinx' s Spartan Ⅱ E Series XC2S100E pq-208 FPGA chip to complete SPWM wave PWM control signal wave and control the power electro
OFDM_Security
- This a Simulink model that demonstrates an algorithm that applies wireless security on physical layer. The demonstration is based on 802.11a (simplified) and receiver is implemented on Xilinx Virtex 4 FPGA. The RAR file inlcudes 2 files: 1. Simul
Erosion1
- 运用FPGA xilinx的system gennerator对图片进行腐蚀-Using the system gennerator FPGA xilinx corrosion images
XilinxFPGA
- 可以很快学会使用xilinx开发环境ISE，是一个不错的初级入门文件。推荐。-the PDH can easy make u know the sample knowlege on FPGA software ISE.it is worthy reading.
Mark-test
- This file is a project consisting of Mark containing all the project from a to z in vdhl code and works on fpga spartan xilinx board.
WirelesscommunicationFPGAdesign.Verilog
- 无线通信FPGA设计[田耘等编著][程序源代码]_2010112514154616，用Xilinx开发，调用modelsim进行仿真。-Wireless communication FPGA design [TianYun, etal] [source code] _2010112514154616, use Xilinx development, call modelsim simulation.
sssss
- 掌握FPGA可编程门阵列的基本方法 2)．掌握Xilinx ISE 9.0的基本使用方法以及在ise的环境下导入51核及其配置方法 3)．学会将keil编译成功个hex文件变为coe文件，导入例化的rom 4)．学习设计核的关键与方法 -Programmable Gate Array FPGA to master the basic method 2). Xilinx ISE 9.0 to grasp the basic use and the environment in t
DSP48E1_Slice_User_Guide
- xilinx Virtex-6 系列FPGA的DSP模块DSP48E1使用手册Virtex-6_FPGA_DSP48E1_Slice_User_Guide.-The user s guide forDSP48E1 Slice of the xilinx virtex fpga.
fft_2011_3_23(COMPLETE-FFT1024)
- VERILOG FFT IP核调用，以及其控制文件-VERILOG FFT IP core call, as well as its control file
IO_controll
- this a controller, mainly for the nexys2 board based around the spartan 3E fpga from xilinx. controlls various outputs and inputs.-this is a controller, mainly for the nexys2 board based around the spartan 3E fpga from xilinx. controlls various outpu
HOLA
- A simple practice with fpga xc3s200 xilinx, shows the word HOLA on the four displays. The source code is very simple
Design_for_cost_Workshop_student_v5d
- FPGA XILINX v5的介绍资料，比较好用-FPGA XILINX v5 of the presentation materials, relatively easy to use
hello-world
- VHDL CODE FOR DISPLAYING " HAPPY WORLD " ON XILINX SPARTAN 3 E FPGA BOARD
pinlvup
- 利用XILINX的SPARTAN-3A系列的XC3S200A的FPGA为载体，以VHDL为系统逻辑描述的表达方式，完成的数字频率计的设计。-SPARTAN-3A XILINX the use of the FPGA family XC3S200A to vector to the system Logic VHDL descr iption expressions, completed the design of Digital Frequency Meter.
uclinux_v1_00_d
- 文件名uclinux_v1_00_d.rar，是基于XILINX的FPGA的uclinux操作系统，经本人在spartan 3/3e平台上验证可用。-uclinux_v1_00_d.rar is based on the XILINX s FPGA-uclinux operating system, after I verified in the spartan 3/3e platform available. File Name uclinux_v1_00_d.rar, is based on
DCM
- 详细介绍了基于XILINX公司FPGA时钟管理模块DCM的IP核生成和使用-xilinx ise DCM
ISE0108
- xilinx ise 使用简明手册 vhdl fpga -xilinx ise
digital-clock
- Digital clock applicatian using seven segment with fpga xilinx
honglvdeng
- Verilog HDL作为一种规范的硬件描述语言,被广泛应用于电路的设计中。他的设计描述可被不同的工具所支持,可用不同器件来实现。利用Verilog HDL语言自顶向下的设计方法设计交通灯控制系统，使其实现道路交通的正常运转，突出了其作为硬件描述语言的良好的可读性、可移植性和易理解等优点，并通过Xilinx ISE6.02和ModelSim5.6完成综合、仿真。此程序通过下载到FPGA芯片后,可应用于实际的交通灯控制系统中。-Verilog HDL as a standard hardware