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counter
- 计算器的源代码，了解计算器的使用方法。计算器的各种功能，实现各种功能，-counter
cpnn
- Counter Propagation Network for simple character recognition source code in C
visitor
- Digital visitor counter is a reliable circuit that takes over the task of counting Number of Persons/ Visitors in the Room very Accurately. When somebody enters into the Room then the Counter is Incremented by one and when any one leaves the room the
8bit_upDown_counter
- a simple 8 bit up/down counter, very handy and optimized
adder
- 基本组合电路 含异步清零和同步时钟的加法计数器-Basic combinational circuits with asynchronous clear and the addition of synchronous clock counter
digital-frequency
- 数字频率计 采用Verilog语言编写，分为8个模块，分别是计数器，门控，分频，寄存器，多路选择，动态位选择，BCD译码模块-Digital frequency meter using Verilog language, divided into eight modules, namely, the counter, gated, frequency, register, multiplexer, Dynamic Choice, BCD decoding module
counter
- 计数器VHDL,可以用modersim仿真-it is a a a a aa a a a a a a counter VHDL
Fre_Counter_verilog
- 基于ep3c25的FPGA频率计的简单设计（用verilog HDL），直接打开即可-FPGA frequency counter based on ep3c25 of simple design (using verilog HDL), can directly open the ... ...
a_time_counter_using_verilog
- a time counter using verilog
a_bcd_counter_using_verilog
- 3 bits bcd counter using verilog
counter
- 基础的计数器，对于新手来说也许会用的着。可作为基本子程序使用-Based counter, for the novice may use the. Can be used as a basic subroutine
counter
- 0到9自动加法计数器 用共阴极七段数码管显示-0 to 9 counter with automatic addition of cathode seven-segment LED display
performance
- 调用windows性能计数器的例子 用delphi开发-Call windows performance counter example
minorproject
- microcontroller based visitor counter
Counter
- 所谓24进制计数器,要在数码管上直观的显示0,1…..22,23等数,再归零-The so-called binary counter 24 to the digital control on the visual display 0,1 ... .. 22,23 and a few, then zero
Counter
- 计数器功能的实现 有前后台的制作 数据库 很容易移植-Counter function before and after the realization of a production database platform is easy to transplant
frequencymeter
- 测量频率的方法有多种,其中电子计数器测量频率具有精度高、使用方便、测量迅速，以及便于实现测量过程自动化等优点，是频率测量的重要手段之一。-Measuring the frequency of means, including electronic counter to measure frequencies with high precision, easy to use, fast measurement and easy to realize the advantages of automa
count
- 一种计数器的FPGA的verilog源程序和仿真图谱-A kind of counter verilog source code and simulation of FPGA-map
max
- 这是一个在MAX+plus上面的计数器仿真图，基于FPGA的仿真。-This is a counter above the MAX+ plus simulation map, FPGA-based simulation.
Counter_Design_Block
- Here is a code for a simple counter based on verilog