搜索资源列表
ref-sdr-sdram-vhdl
- DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
用VHDL语言在CPLD_FPGA上实现浮点运算
- 用VHDL语言在CPLD/FPGA上实现浮点运算的方法-in VHDL CPLD / FPGA achieve floating-point computation methods
vhdl对数
- 对数计算源程序，能够在FPGA中计算某数的对数，VHDL源代码，-right calculating source, the FPGA can be calculated for a number of a few, VHDL source code,
USB控制器VHDL程序
- USB控制器VHDL程（usb_xilinx_vhdl）,用XILINX公司的FPGA实现-VHDL-USB controller (usb_xilinx_vhdl) XILINX FPGA
基于FPGA的数字信号显示系统软硬件设计
- 该文阐述了现场可编程逻辑器件FPGA的主要特点，应用FPGA芯片和VHDL硬件描述语言设计的模拟示波器数字信号显示系统的设计原理和设计方法。-this paper, the field programmable logic devices FPGA main feature FPGA chip and VHDL hardware descr iption language design analog signals to digital oscilloscope system design pr
20051113104111170
- FPGA的VHDL设计经验总结《小型微型计算机系统》2003年7月-FPGA VHDL design experience, "small micro-computer system," July 2003
fpga-example1
- 集中了十几个vhdl经典程序,如lcd,led控制程序和多种接口程序-focus of a dozen VHDL classic procedures, such as LCD, led control procedures and multiple interface program
fpga-example2
- ASK调制与解调VHDL程序及仿真 FSK调制与解调VHDL程序及仿真 PSK调制与解调VHDL程序及仿真 基带码发生器程序设计与仿真 频率计程序设计与仿真-ASK modulation and demodulation VHDL simulation procedures and FSK modulation and demodulation process and VHDL simulation PSK modulation and demodulation process
200632146671689
- 基于vhdl在FPGA中实现高精度快速除法-based on the FPGA VHDL precision rapid division
fpga-jpeg
- vhdl实现的ＪＰＥＧ嘿嘿 嘿嘿圆圆嘿嘿另-VHDL achieve JPEG laughter laughter another round laughter
vhdl-fpga
- 这是一本很好用的VHDL编程书，各位看了就明白。-This is a very good use of VHDL programming, you read it to understand.
LED.VHDL
- LED控制VHDL程序与仿真 分别介绍采用FPGA对LED进行静态和动态显示的数字时钟控制程序-LED control procedures and VHDL simulation briefed on the use of FPGA LED static and dynamic significantly the figures show clock control procedures
Silicon_Integrity，VHDL
- 信号完整性，设计FPGA的基础-signal integrity, design based FPGA
USB245I
- USB245I的基于FPGA的VHDL语言的驱动程序,应该有用-USB245I based FPGA VHDL of the driver, should useful
SONGER
- 基于FPGA的VHDL可以产生不同的音调,象音乐一样-based FPGA VHDL can produce different tones, like the same music
add_multi
- 移位相加硬件乘法器,基于FPGA的VHDL语言编写的,含有全部文件-displacement add hardware multiplier, based on FPGA VHDL prepared, containing all the documents
基于FPGA的负延迟设计
- 用VHDL语言写的基于FPFA的负延迟设计(FPFA based negative delay design written in VHDL language)
FPGA
- ⑴实验要求基本要求： ①设置一个复位键，按下按键输出电压清零 ②设置两个功能键，控制输出电压以0.2V的步长进行加减。(Pin sets a reset button, press the button to output the voltage reset You set two function keys to control the output voltage by 0.2v step size.)
基于FPGA的多路同步脉冲发生器设计1
- 采用FPGA（现场可编程门序列）编写VHDL语言设计多路同步脉冲发生器，对信号进行分频处理，实现四路信号相位相差T/16和T/8的延迟相位输出，实现的四路脉冲与传统的脉冲同步器不同，它具有高集成度，高通用性，容易调整和高可靠性等特点。(Using FPGA (field programmable gate sequence) to write VHDL language to design multi-channel synchronous pulse generator, to divide
FPGA应用开发入门与典型实例
- FPGA学习资料，VHDL硬件描述语言详解(FPGA learning materials, VHDL hardware descr iption Language)