搜索资源列表
USB2.0 IP核
- 完整的用VERILOG语言开发的USB2.0 IP核源代码,包括文档、仿真文件
I2c Core IP 核
- 可在SOPC中运行的IP核,经过系统验证
一些有用的IP核
- 包含FIFO,LUT,SPMEM,DPMEM,SDRAM等常用IP核
USB_1.1IP核
- 这是USB的一个机遇FPGA的IP核设计。欢迎大家使用
DDR内存接口VC源程序IP核
- 很难看到的 DDR内存接口VC源程序IP核 ! 各大公司用它卖钱的哦!
在ISE下调用计数器IP核
- 非常简单的计数器,在ISE下调用计数器IP核,使用verilog开发得到的。-Very simple counter, under the invocation counter in the ISE IP cores, development has been the use verilog.
USB.rar
- 用VHDL实现的USB IP核,大家可以参考下,Use VHDL to achieve USB IP core, we can refer to the following
usb11.rar
- 基于verilog HDL的一个USB 1.1的IP 核,内有详细文档说明。,Verilog HDL based on a USB 1.1 of the IP core, which has detailed documentation.
pwm_avalon_interface.rar
- 这是一个完整的pwm ip 核,可在sopc中实例化该核,下载即可用,绝对好使。,This is a complete nuclear pwm ip can be instantiated in SOPC in the nuclear, you can download, and absolutely so.
USB2.0IP.rar
- 完整的用VERILOG语言开发的USB2.0 IP核源代码,包括文档,Complete Verilog language developed by USB2.0 IP core source code, including documentation
Character_LCD.zip
- 这是一个 NIOSII系统的 1602LCD 控制IP核,This is a system NIOSII nuclear 1602LCD control IP
FPGA.rar
- 利用FPGA的51 IP核实现与单片机和ARM的串口通信,FPGA connect with MCU and ARM
C8051IP.rar
- FPGA应用,51单片机的IP核,在FPGA中嵌入单片机的源代码,FPGA applications, 51 MCU IP core, single-chip embedded in the FPGA source code
FSK
- 利用FPGA内的IP核来实现FSK,Using FPGA to realize the IP core FSK。-Using FPGA to realize the IP core FSK,
PWM_LED.rar
- 基于ALTERA公司NIOSII的LED灯控PWM IP核设计,ALTERA-based company controlled NIOSII the LED lamp PWM IP-core design
8051
- alter公司的mcu核,8051ip核,为quartus2设计,其他应该兼容 -alter the company' s mcu nuclear, 8051ip nuclear, for quartus2 design should be compatible with other
IPcore
- 基于EP3C25的Altera SDI IP核的使用-EP3C25 Altera SDI IP
SDRAM_ipcore_
- Altera SDRAM ip核详解-Altera SDRAM ip nuclear Detailed
VERILOG-USB2.0IP-core
- 完整的用VERILOG语言开发的USB2.0 IP核源代码,包括文档、仿真文件-VERILOG language with a complete development of USB2.0 IP core source code, including files, simulation files
lcd_tri_12864
- lcd模块128x64 ip核 Avalon三态总线-lcd128x64 Avalon tristate