搜索资源列表
Floating-Point-Adder
- 浮点数加法器IP核的vhd设计。浮点数加法运算是运输中使用最高的运算，结合vhdl和EPGA可编程技术，完成具有5线级流水线结构、符合IEEE 754浮点标准、可参数化为单、双精度的浮点数加法器。-Floating point adder design IP core vhd. Floating-point addition operation is used in most transport operations, combined with vhdl and EPGA programmab
Cordic
- cordic算法ip核,国外网站搞到的,可以应用于电机控制，快速数值计算，基于FPGA硬件实现-cordic ip core,just enjoy
vhdl5
- 利用IP core完成2X16字符液晶屏的访问。通过写命令来控制将数据写到哪一行；通过写数据，将数据输出在液晶屏上显示。-Using IP core to complete 2X16 character LCD screen access. By writing the command to control where the data write line by writing the data, output data displayed on the LCD screen.
LCD_PS2
- DE2的鼠标IP核的完整套件。使用altera_up_avalon_ps2。有lcd-Mouse IP core DE2 complete package. Use altera_up_avalon_ps2. There lcd
pwm
- 用VHDL语言 描述 生成pwm的 IP核-Pwm using VHDL language to describe the generation of IP core
altera_fft
- Alter公司的FFT的IP核源代码，在QuartusII软件中运行-Alter' s FFT of the IP core source code, software running in QuartusII
8051vhdl_ip_core
- 8051完整ip内核Vhdl源代码程序。-8051 ip core Vhdl complete source code program
mylcdip
- lcd vhdl ip 核 挂接在 opb 总线上 可以完美实现 lcd 字符液晶的 驱动。-this is a vhdl lcd character ip core based on OPB （onchip periheral bus）
AMBA_bus-based_dual-protocol_Digital-Audio-Interfa
- 基于AMBA总线的双协议数字音频接口IP核设计-AMBA bus-based dual-protocol Digital Audio Interface IP Core Design
usb2
- USB 2.0 IP Core for USB Interfacing
pipelined_fft_256_latest
- FFT的ip核，是256位的，可以用在FPGA上进行FFT操作。-FFT' s ip core, is 256, and can be used in FPGA on FFT operation.
Linux-Network-Programming
- 《Linux网络编程》内容简介：Linux是目前最流行的开源操作系统，网络功能在Linux下占有核心的地位。《Linux网络编程》循序渐进地从应用层到Linux内核、从基本知识点到综合案例，向读者介绍如何在Linux下进行网络程序设计。《Linux网络编程》内容分为4个部分：Linux程序设计基础部分、Linux用户空间网络编程部分、Linux内核网络编程部分以及综合案例部分。内容包含Linux系统概述、Linux编程环境、Linux文件系统简介、Linux下的进程和线程、TCP/IP协议族、应
alteraipcore
- Altera公司的15个ip核的源代码，找了很久才找到的一些常用ip core-Altera 15 nuclear source ip
15freeIP
- 15个免费的IP核，对与VHDL语言学习有很大的帮助-15 free IP core, with the VHDL language learning is very helpful
PWMcore
- 基于xilinx FPGA软核microblaze编写的PWM波产生IP核，在EXCD开发板上调试通过，内附UCF文件和说明-it s an IP core based on microblaze,it can produce pwm wave.
SEGcore
- 基于MICROBLAZE的数码管扫描IP核，在EXCD开发板上调试通过，可移植至其他开发板-An IP core based on microblaze,it is used for leds scanning
miniuart2
- 用ＶＨＤＬ在CPLD/FPGA上实现与PC机的RS232通信-This UART (Universal Asynchronous Receiver Transmitter) is designed to make an interface between a RS232 line and a wishbone bus, or a microcontroller, or an IP core. It works fine connected to the serial port of a
51
- 51单片机IP核，内含两个压缩包和文档。-51 MCU IP core, containing two compression packages and documents
h264_baseline_dec_ip_core
- 这是一个有关h264解码器的IP核源代码，内有对其内部各功能的整体说明。-This is a relevant h264 decoder IP core source code for its internal function within the overall descr iption.
UARTVHDL
- 异步串口程序的IP核，分层文件编写，包括顶层文件和底层封装文件，VHDL编写-IP core asynchronous serial procedures, hierarchical document preparation, including the top and bottom package file documents, VHDL preparation