搜索资源列表
blk_write
- verilog 块ram写入操作 fpga xilinx ip core-Verilog block_ram module fpga xilinx ip core
IIC-SOPC
- SOPC系统的I2C代码 直接可用，可作为ＩＰ核用到自己的系统中-SOPC system I2C code directly available, can be used as an IP core in your system
ThesummaryofSoCOCB
- 随着以IP核复用为基础的SoC设计技术的发展，工业界及研究组织积极从事相关IP互联标准 方案的制定工作，从目前的研究和发展看，影响力较大的有IBM 公司的CoreConnect、ARM 公司的AMBA 和Silicore Corp公司的Wishbone。基于现有IP互联接口标准技术的发展现状，本文对这三种SoC总线技 术进行了详细介绍。-Along with the IP core reuse-based SoC design technology, industry and res
sp601_MIG_rdf0005_12.2
- spartan—6fpga 用mig生成ddr2接口的ip核，用户可以直接调用此ip控制ddr2-spartan-6fpga generated by mig ddr2 interface ip core, the user can call this ip control ddr2
00
- 用VHDL语言调用IP核，在ISE中实现三角波-VHDL IP core with the realization of the triangular wave is called
TERASIC_ISP1362
- sopc中ISP1362的IP核，经验证，可以使用，保证正确！-sopc the ISP1362 the IP core, proven, you can use to ensure correct!
8_dv
- 一个简单的触发器实现，调用的是IP核，比较简单，适合初学-A simple flip-flop implementation, called the IP core, relatively simple, suitable for beginners
pc_cfr_xmp039
- Xilinx IP核pc_cfr的产品说明，全英文文档，下载前需注意；-product brief of Xilinx ip core pc_cfr
pc_cfr_ds750
- Xilinx IP核pc_cfr数据手册，全英文文档，下载前需注意；-datasheet of Xilinx IP Core pc_cfr
8051
- 51ip核 用vhdl编写 在迅雷上下载-51 ip core write with vhdl
UART
- 用硬件描述语言实现的uart的IPcore，有详细的注释和测试文件-Hardware descr iption language of the H.264 encoder, detailed notes and test files
illinoi_arm7
- 一种ARM IP core，国外一个论坛上载下来的，希望能有所用处-A ARM IP core, a forum set off abroad, and hope to be useful
ISE_lab15
- 利用XILINX官方例程熟悉PicoBlaze软核；熟悉使用Architecture Wizard配置和初始 化DCM；掌握使用核生成器（Core Generate）生成一个IP核，并将其插入到设计中。-XILINX official familiar with the routine use of soft-core PicoBlaze familiar with the Architecture Wizard configuration and initialization DCM
shiyanbaogao
- 了解ISE平台的基本环境，编译程序，在MC8051 IP核中，要求实现：增加PLL锁相环，扩大内部RAM，定时器，串口和外部中断等资源，并增加乘法器和除法器的功能。-ISE platform to understand the basic environment, compiler, the MC8051 IP core, the requirement to achieve: increased PLL phase-locked loop, expanding the internal RAM
i2c
- I2C IP CORE Verilog quartus-I2C IP CORE Verilog quartusii
lcd-ip-core
- LCD 驱动的IPCORE，可用于alteraFPGA-LCD driver IPCORE, can be used to alteraFPGA
trunk
- 定点算法实现的FFT基-4 ＩＰ核源代码，文件使用的ＴＸＴ格式，方便大家阅读，复制到ＩＳＥ中即可仿真综合-Fixed-point algorithm of the FFT-based-4 IP core source code, use the TXT file format to enable easy reading, can be copied to the ISE in the integrated simulation
AIC23IP
- AIC23的IP核，提供ＮＩＯＳ ＣＰＵ与FPGA 的通信方式-AIC23' s IP core, providing NIOS CPU means of communication with the FPGA
source
- FPGA中实现I2C接口的一个IP核，包含verilog及VHDL代码。方便迅速理解和开发I2C总线接口。-FPGA to implement an I2C interface IP core that contains verilog and VHDL code. Facilitate rapid understanding and development of I2C bus interface.
DDR2PTiming
- 用Xilinx ip core 生成器所产生的DDR2控制器，进行时序分析代码-Xilinx ip core generator a ddr2 controllor time analysis