搜索资源列表
u-uart
- 一个可综合的串并转换接口verilog源代码-a comprehensive series of conversion and interface Verilog source code
lcd_module
- verilog code which receive from uart RX and then output to lcd text display.
uart
- UART串口的verilog源代码，完全正确-UART serial Verilog source code, completely correct ...........
UART
- 带有自适应功能的UART，是用VERILOG编写的源码，包括测试文件，与大家分享-Adaptive function with UART, are prepared using VERILOG source code, including test papers, to share with you
RD1011_rev01.2
- 采用VHDL实现的UART硬件模块，该模块包括了modem的硬件实现，已经仿真测试代码，顶层模块可以采用VHDL或verilog实现，便于嵌入到自己的设计之中。文档中附有详细的使用说明和注释。-Achieved using VHDL hardware UART module, the module includes the hardware modem has simulation test code modules can be used top-level VHDL or verilog t
uart_0910
- uart串口传输的verilog RTL级源码，已通过仿真验证。文件主要包含发送、接受位处理，发送、接受字节帧处理，对学习串口通信的朋友很有帮助-uart serial transmission verilog RTL-level source code has been verified by simulation. File mainly contains the send, receive digital processing, sending, receiving bytes of fr
UART_verilog
- 用Verilog写的串口程序，是每一个学习Verilog的人的入门第一步-a uart port code of Verilog，which is the first project for beginners
Uart
- 用Verilog编写的实现UART接口的源程序-Prepared with the Verilog source code to achieve UART interface
LIP4101CORE_uart
- UART Verilog sourc code
verilog_uart_log_vhdl_uart_log
- verilog uart mode code VHDL uart mode -verilog uart mode code VHDL uart mode code VHDL uart mode
uart
- uart发射机Verilog HDL代码-Verilog HDL code uart transmitter
uart_top
- UART的verilog代码，tx，rx皆可-Verilog code of UART, tx, rx Jieke
uart
- 用verilog编写的uart代码，比较适合初学者练练手，包含初始化，收发等模块-Written code with verilog uart, more suitable for beginners practice your hand, including initialization, sending and receiving modules
my_uart1_VERILOG_using-PLL
- Verilog uart example, RS232的Verilog例子。PC 发送一个字节（byte）到板子（FPGA），板子回发一个(byte+1).例子简洁，有注释。用到PLL，而且有3：2次数据采用-Verilog uart example，Verilog RS232 example，it s easy to understand, PC send 1 Byte RS232 code to FPGA, FPGA return 1 tht code，but Byte+1， Using P
LCD1602_UART
- kc705上的1602显示模块的verilog源码，以及UART源码，附带一些设计过程资料(kc705 1602 display module source code,and UART source code.addition to some design progress document.)
uart_design
- UART设计的VERILOG代码，具有FIFO功能，能实现CPU与外设之间的数据与指令通信(The VERILOG code designed by UART, which has the function of FIFO, can realize the communication between the data and the instruction between the CPU and the peripherals)
verilog
- lcd1602 12864显示程序代码，串口传输数据代码(lcd1602 12864 code,UART code.)
uart_rx
- Verilog实现的RS232发送和接收程序，有完成的verilog代码，testbench等。(UART send and receive verilog code, including verilog source code, testbench etc.)
apb_uart
- 这里是apb总线设计代码。这个源程序是基于verilog语言设计的(Here is the APB bus design code. This source program is designed based on Verilog language)
04_uart_test
- 基于FPGA的串口通信实验，用的是黑金板子CYCLONE IV(FPGA UART test code,simple and easy to study,good)