搜索资源列表
RS232CUART
- 详细介绍了基于verilog设计uart的原理，并提供源代码，实用性强-Detailed design based on Verilog UART principle, and to provide source code, practical
innovateasia2009
- 串口uart的vhdl，verilog，lattic实现原码-The uart serial vhdl, verilog, lattic realization of the original code
UART_verilog
- 一个uart的Verilog代码，希望能够帮助你做UART逻辑。-Code about uart. You can use it as an example when desighn UART logic.
uartvhdl
- 该程序是基于UART的控制，有VHDL和verilog的源码，共有兴趣的朋友参考-The program is based on the UART' s control, there is VHDL and verilog source code, a total interest of a friend reference
LIP1745CORE_uart_txfsm
- UART TX FSM Verilog source code
Verification_of_UART
- 使用Systemverilog语言对UART进行验证，其中UART代码为verilog语言-Use Systemverilog language UART to verify which code for verilog language UART
UART_send
- uart的verilog代码，在赛灵思的spartan 3E上经过验证，电路有一定的质量。-The verilog uart code, in the spirit of the best Spartan 3 E after verification, circuit has certain quality.
UART_acpt
- The verilog uart code, in the spirit uart的verilog代码，在赛灵思的spartan 3E上经过验证，电路有一定的质量。-The verilog uart code, in the spirit of the best Spartan 3 E after verification, circuit has certain quality.
s24_uart
- 这是一个串口通信协议，有详细的说明，欢迎下载！-This a code of uart in verilog ，describled in detail,welcome to download!
FPGA---buld-gennerate
- verilog uart 源码，编译器ISE9.1i版本，很有用的源码-verilog uart code
V0p10
- 完整的基于verilog HDL语言UART代码~-Complete based verilog HDL language UART code to
UART_Transmitter_Arch
- 自己编写的带有FIFO的UART串口发送模块，代码通过状态机实现，开发语言是Verilog-I have written to the FIFO UART serial transmit module code through the state machine implementation, development languages Verilog
uart_rtl
- uart模块的rtl代码，verilog编写。-uart module rtl code, verilog prepared.
async_transmitter
- 使用Verilog编写串口发送16bits，内含补码运算；参数化编写。-verilog uart 16bits transmitter two s complement parameter code
UART_FPGA_Code
- UART FPGA实现过程文档说明，及VERILOG HDL 代码，希望能帮助有需要的人，-UART FPGA implementation process documentation, and VERILOG HDL code, hoping to help people in need, thank you
uart_tx
- 硬件描述语言设计的串口发送源代码UART TX SOURCE CODE-Verilog HDL UART TX RTL SOURCE CODE
uart_verilog
- UART串口通信代码，FPGA编程，用Verilog代码编写-UART serial communication code, FPGA programming with Verilog coding
uart_Verilog
- uart接口verilog源码，实现数据串并行的转换。内容包含十个代码文件。-uart Interface verilog source of data for serial-parallel conversion. Contains ten code files.
uart_latest.tar
- 串口（UART）的verilog源代码，可以供设计参考-Serial port (UART) of the Verilog source code, can be used for reference in design
pci_uart_parity
- uart pci 等verilog hdl 代码-uart pci such as verilog hdl code