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uart
- 基于verilog语言，使用FPGA对串口功能进行模拟与实现-Based verilog language, use the serial port function simulation and FPGA implementations
UART
- Verilog写的串口代码，包括发送和接收，在DE2平台测试通过。-Verilog write a serial port code, including sending and receiving, the DE2 platform test pass.
CHUANKOUrxtx
- Verilog写的串口收发程序 ,基于FPGA的相关测试，亲测没有任何问题。-Verilog write the serial transceiver procedures, FPGA-based correlation test, pro-test without any problems.
async_receiver
- 用于RS232串口接收数据的verilog语言，时钟速率可改，可直接调用。- ON划词翻译ON实时翻译 Serial port for receiving data of the Verilog language, can be called directly.
UartSend
- Uart串口发送的Verilog程序，用于测试开发板的串口发送功能-Verilog program Uart serial port for test development board serial transmission function
UartRecv
- Uart串口接受Verilog程序，用于开发板串口接受功能测试-Uart serial accept Verilog program for development board serial accept functional test
UART_FPGA_VerilogHDL
- FPGA RS232串口通信，Verilog HDL代码-FPGA RS232 serial communication, Verilog HDL code
T01_UART_CORE
- Verilog 实现的 UART串口读写控制核 参数化校验、时钟设置，完整工程（xilinx），包括文档、源码等。供学习参考，希望大家上传自己代码，共同提高，打倒小日本。-Verilog implementation of the UART serial port to read and write control nuclear parametric check, clock setting, complete project (Xilinx), including documentation
09_uart2
- FPGA UART与计算机pc进行串口通信Verilog程序，含有波特率选择，发送器，接收机以及顶层文件，再PC机上通过串口调试助手与FPGA进行通信。-FPGA UART
source
- 使用EP4CE15F17型号的FPGA芯片做的串口协议，使用Verilog HDL完成描述，通过仿真和实验证明功能完好。-FPGA chip using EP4CE15F17 models do serial protocol, using Verilog HDL to complete the descr iption, the simulations and experiments show that function well.
uart_verilog
- 用verilog实现串口通信，实现串口的接收及发送。-Using Verilog serial communication, the realization of sending and receiving serial.
UART
- Verilog语言实现的串口程序，能够烧到开发板上，并与PC连接，通过串口调试助手能够在PC上看到效果。亲测可用-Verilog language serial program that can burn the development board and connected to the PC, to see the effect on the PC via the serial port debugging assistant. Pro-test available
FPGA_Uart_Verilog-
- Verilog HDL编程，实现FPGA串口通信，实验报告含代码和原理-Verilog HDL programming, FPGA serial communication, test reports containing the code and principles
UART
- 已经过调试成功的fpga串口模块，verilog编写-Has been successful commissioning of fpga serial module, verilog write
UART_FPGA
- 可以多波特率设置，奇偶校验可以设置，verilog编写，经过调试成功的串口模块-Baud rate settings can be more, parity can be set, verilog written after the successful commissioning of the serial module
S18_UART_IN_HDL
- 带mif文件的，串口模块，verilog编写，经过检验的。-With mif files, serial module, verilog written proven.
uart_8
- 用verilog描述的串口通信接口，主体为接收机和发送机两个模块-Serial communication interface with Verilog descr iption, subject to a receiver and transmitter module two
uart_an_jian
- verilog描述的串口，能够接收数据，发送数据采用按键触发-Verilog descr iption of the serial port, receive data, send data using the trigger button
TX
- 串口发送控制程序！在一帧的发送下，经过串口协议编写的硬件描述语言verilog！-Serial transmission control program!
ps2scan
- 采用VERILOG的CPLD编程，通过ps2接收键盘数据，然后把接收到的字母A到Z键值转换相应的ASII码，通过串口发送到PC机上。 -Using VERILOG CPLD programming, through the PS2 receive keyboard data, and then receive the letters A to Z key transformation corresponding ASII code, through the serial port to se