搜索资源列表
rs232
- verily 串口rs232代码，可参数化波特率-uart code in verilog
class11_uart_rx
- 主要使用Verilog代码编程的串口接收程序-Mainly use Verilog code programming serial port to receive
class11_uart_tx
- 主要是使用Verilog代码编程的串口发送程序-Mainly use Verilog code programming serial port to send the program
S8_UART_V2
- 红色飓风开发板提供uart串口程序，verilog实现，一定可以参考并使用-FPGA uart verilog
4M4ppm
- 以前用verilog做的 4ppm编码，红外通信的编码解码，串口速度4Mbit每秒-Previously used verilog to do 4ppm encoding, infrared communication codec, serial speed 4Mbit per second
uart
- 串口通信，verilog实现FPGA的串口通信，包括发送与接收-Serial communication, Verilog achieve FPGA serial communication, including sending and receiving
UART_Send_handle
- 这是一个很好的基于verilog的串口通信422模块，已经经过多次验证，绝对可靠，可直接使用，本人已在工程中多次使用，无误差-This is a good serial communication based on Verilog 422 module, has been repeatedly verified, absolutely reliable, can be used directly, I have repeatedly used in the project, no error
UART_TX
- verilog写的串口发送程序，具有单字节发送和多字节发送功能，附带testbench，可自行验证-verilog write serial transmission program, sending a single byte and multi-byte transmit function, with testbench, can verify their own
UART_RX
- 自己用Verilog写的串口接收程序，有testbench，可实现单字节接收和连续接收，testbench可测功能-Own use Verilog write serial reception procedures, testbench, can achieve single-byte receive and continuous reception, testbench measurable function
FPGA-for-UART-source-code
- 针对UART接口通信FPGA的Verilog源代码，主要包括串口读和串口写个模块-Verilog source code for UART interface communication FPGA, including serial read and serial write module
class11_uart_tx
- verilog编写的串口发送程序，学习串口的话可以用作参考，已经实际验证过-Verilog prepared by the serial port to send procedures, learning serial port can be used as a reference, has actually verified
class12_uart_rx
- verilog编写的串口接收程序，学习串口的话可以用作参考，已经实际验证过-Verilog prepared by the serial receiving procedures, learning serial port can be used as a reference, has been verified
uart
- 该模块是基于串口协议用verilog实现了串口的接收和发送功能。-The module is based on a serial port protocol using verilog to realize the function of receiving and sending of the serial port.
18.UART
- 使用verilog语言实现FPGA上的串口程序编写，可实现9600波特率下的收发功能，且占用逻辑单元较少-The use of verilog language FPGA on the serial program to achieve, can achieve 9600 baud rate transceiver function, and occupy less logical unit
tlc549uart
- 利用EP2C8Q208C8N芯片控制串口通信，FPGA,Verilog-Using EP2C8Q208C8N chip control serial communication, FPGA, Verilog
uartfifo
- 串口通信例程，使用FIFO数据缓存。Verilog源码，基于FPGA的uart开发，加深理解。-uart communication
uarttx
- fpga板 verilog写的串口发送数据的模块，主要可以看下思路，也是可用的-Fpga board verilog write serial port to send data module, the main can look at ideas, is also available
uart
- 嵌入式串口通讯，采用verilog编写，在altera开发板上运行(Embedded serial communication, written using Verilog, altera development board on the run)
8_1
- 一个具有置位、复位、左移和右移功能的八位移位寄存器/“01011010”序列检测器。移位寄存器电路端口为：异步清零输入端口rst，输入时钟clk，置数判断输入端口load，移位类型判断输入端口m，数据输入端口data[7:0]，输出端口q[7:0]。序列检测器电路端口为：异步清零输入端口rst，输入时钟clk，串行数据输入端口d，输出标志端口s。(A eight bit shift register / 01011010 sequence detector with set, reset, le
RS_422
- 在K7FPGA上利用verilog语言编写的RS422串口，由于没找到Verilog所以选择了VHDL(On the K7FPGA, using Verilog language RS422 serial port, because did not find Verilog, so chose VHDL)