搜索资源列表
t4_fifo
- FIFO的verilog与VHDL的实现，并与FIFO的IP核做对比，为了方便大家学习，每个文件均附有测试脚本文件，希望对大家有用。-The FIFO verilog and VHDL implementation with FIFO IP core to do comparison, in order to facilitate learning, each file with a test scr ipt file, we want to be useful.
problem
- 在学习verilog 中与遇到一些列问题的整理。-this Documentation is about the problem about verilog which is meeted when i was learn FPGA
led_state3
- verilog 三段式LED,有益于参考学习状态机！-verilog led three state
SensorHubDesignFilesSourceCode
- sensor-hub技术是最新出来的技术，目前用在智能手机领域，手机里面的传感器越来越多，这给CPU带来很大的负担，功耗也随之提高。sensor-hub技术出来后，可以有效的解决这个问题，这是运行在lattice FPGA平台上的verilog源代码，欢迎大家一起交流学习，希望能给你带来帮助。-Sensor- the hub is the latest technology, the current use in the field of smart phones, mobile phone i
player
- 这是我利用Verilog hdl语言写的关于音乐播放器的程序，其中还包括了仿真结果，该播放器播放的是梁祝，希望对学习Verilog hdl的同学有所帮助-This is what I use Verilog hdl language program written on the music player, which also includes the simulation results, the player is Butterfly, I hope to learn Verilog hdl
syn
- 载波同步的verilog代码，是新手学习同步的最佳选择，值得推荐。-Verilog code carrier synchronization, synchronization is the best choice for novices to learn, it is worth recommending.
Hardware-Layout-Design-for-DDR2
- ddr2的硬件布线设计学习资料-hardware design for ddr2，verilog
LCD1602
- VERILOG 语言写的1602液晶屏显示，大家相互学习 相互参考-VERILOG language
jishuqi
- verilog语言实现计数器等功，可以供给大家学习参考，入门价值较大-verilog language counters and other functions, can supply them to learn from reference, value larger entry
Verilog_HDL
- 本文档记录了有关Verilog HDL语言学习的注意地方,以及一些关键语法的摘抄,初学者可以查找有关Verilog HDL的语法,加快学习。-This document records the Verilog HDL language learning about local attention, as well as some of the key excerpt syntax, beginners can find information about the syntax of Verilo
AHBArbiter
- AMBA ahb总线协议的arbiter模块源代码，verilog编写，适合新手学习使用。-this is a code of AMBA AHB arbiter protocol in verilog
count4
- 计数器VERILOG,用于学习FPGA，编译已通过-VERILOG 计数器
OpenMIPS_VerilogHDL_Study_v1.1
- 10天用verilog实现MIPS_cpu，内有清晰结构图。很好的cpu设计学习资料！-10 days with verilog achieve MIPS_cpu, within a clear structure diagram. Good cpu design learning materials!
include
- c++转verilog，快速进行fpga原型验证，不需要学习verilog，只需要学习c++即可，已经成功应用于某实时系统设计。-c++ translate verilog
Verilog_prj
- 特权同学的CPLD学习版 Verilog和VHDL代码。含有仿真文件。-Learning Edition privileged students CPLD Verilog and VHDL code. Contains simulation files.
code
- c++语言转verilog语言，程序员不需要学习verilog即可对fpga原型进行快速仿真，本例为catapult c语言的fft程序，可以利用catapult转换工具转成verilog语言， 用modelsim进行仿真，并且可以加各种约束。-c++ program translate verilog program。
cnt201403010
- verilog写的计数器，很简单的一个计数功能，供初学者参考学习-verilog write counter, very simple counting function reference for beginners to learn
circuit_timing
- verilog延时电路的不同写法，和综合能否。可对比学习-Different wording verilog delay circuit, and comprehensive ability. Comparable learning
led
- FPGAled灯控制，采用Verilog语言，入门学习，调试使用-FPGAled light control, using Verilog language learning portal, debugging
ourdev
- 基于VERILOG语言的集成电路设计基础，供给初学者学习。-Integrated circuit design based on VERILOG language foundation, supply a beginner to learn