搜索资源列表
smg
- 基于FPGA 的Verilog语言数码管 1到100的循环计数-fpga LED
key-control-shumaguan
- 按键 控制 数码管的 verilog程序 ！ 代码简单，适合初学者 ！-Buttons control the digital control verilog program! Code is simple, suitable for beginners!
seg7_driver
- verilog七段数码管驱动，显示内容可以自己更改。-verilog segment digital tube driver
calc
- 一个简单的verilog计算器设计，键盘输入，数码管显示，实现加减与或运算-A simple calculator verilog design, keyboard input, digital display, Modified with OR operator
electronic-clock
- 基于FPGA的电子时钟的七段数码管显示+按键控制verilog程序-FPGA-based electronic clock seven-segment LED display+ button control verilog program
Fpga-based-ADC-sampling-voltage-
- 基于fpga的ADC采样电压用，显示在数码管上。verilog语言。-Fpga-based ADC sampling voltage used, displayed on the digital pipe. verilog language.
zigeti
- 基于FPGA的verilog语言写的按键控制步进1 的输出占空比从1 到99 的脉冲波，并用两位数码管显示出脉冲波占空比，按键key10加1 ,按键key11减1 。-FPGA-based verilog language button control stepper output duty cycle of 1 from 1 to 99 of the pulse wave, and use two digital tube display pulse duty cycle, key ke
SEG7
- 基于xilinx的开发板，利用verilog语言实现扫描数码管，小键盘和计数的功能-Xilinx development board based on the use of digital scanning verilog language, keypad and counting functions
muti-function-clock
- 用来实现多功能数字钟，可调节闹钟铃声和数码管显示-muti-function digital clock verilog code
key_duli
- FPGA实现verilog语言的按键防抖功能，能够很有效的实现了按键的加减数据的功能，通过一位数码管显示。-FPGA implementation verilog language button image stabilization feature, can be very effective to achieve the subtraction key data features, through a digital display.
key
- 应用verilog语言实现4*3按键输入显示在数码管上。-Application verilog language 4* 3 key input on the digital display.
FPGA_8bitLED
- 本源码是用verilog编写的FPGA程序，其中包括了7段数码管显示模块和8位转换器。-The source code is written in verilog FPGA program, including 7-segment LED display module and 8-bit converters
smg_99
- 运用verilog，控制数码管从1开始计数到99，希望在这里和大家一块学习交流-Use verilog, control starting from 1 to 99 digital tube, hope and everyone here a study and communication
06_sled
- 用Verilog HDL语言编写数码管静态显示-Use Verilog HDL language digital tube static display
07_dled
- 用Verilog HDL语言编写数码管动态显示-Use Verilog HDL language dynamic digital tube display
iic_top
- iic协议的功能实现verilog HDL代码，并用7段数码管进行验证，压缩包内含有整个工程文件。-function iic protocol implementation verilog HDL code and seven-segment LED to verify, compressed package file containing the entire project.
digital-clock
- fpga verilog 2位数码管显示仿真及说明-fpga verilog 2 digit LED display and descr iption of the simulation
20131201q_IR_gxy
- 这是调试红外的verilog代码，红外遥控输入的信息可以直接显示在数码管上-This is the infrared verilog code debugging information infrared remote control input can be displayed directly on the digital
count
- basys2 模60计数器 并用数码管显示 verilog FPGA-basys2 mold 60 counter digital display
pcf8563
- pcf8563，在quartusII下VERILOG编写的数字时钟程序，8位数码管显示-pcf8563, written in quartusII VERILOG digital clock program, eight digital display