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verilog
- 基于DSP和FPGA的CCD 图像采集系统设计与实现-FPGA-based DSP and CCD image acquisition system design and implementation
verilog
- 介绍了一种硬件控制的自动数据采集系统的设计方法,包括数字系统自顶向下 (1DP—DOwN)的设计思路,Vernog}Ⅱ)L对系统硬件的描述和状态机的设计-Introduced a hardware-controlled automated data acquisition system design, including digital systems from top to bottom (1DP-DOwN) design ideas, Vernog} Ⅱ) L of the system
12
- Verilog HDL应用程序设计实例精讲源码-Verilog HDL design example application source code Jingjiang
verilog-
- Verilog HDL设计方法详细教程,简单易懂,容易上手-Detailed tutorial Verilog HDL design, easy to understand, easy to use
xiayuwen
- 本程序是夏宇闻老师的verilog数字系统设计教程中的E2PROM完整程序文件,包括信号产生模块,E2PROM读写模块,E2PROM模拟模块,并且在ISE上运行成功,测试正确,modelsim仿真成功-This program is the Xia Yu Wen digital system design tutorial E2PROM complete file, including the signal generation module, E2PROM reader module, E2P
Verilog---shejijingdianshili
- 经典Verilog的程序设计实例,里面包含了各个实例的详细解释和分析,适合各类开发人员使用-Verilog programming classic example, which contains a detailed explanation of each instance and analysis for all types of developers
PCIbus_Verilog
- PCI总线(Slave)接口FPGA的实现代码,全部为Verilog语言源码文件,还包括测试代码,内附设计实用说明文档。-PCI Bus (Slave) interface to FPGA implementation of the code, all source code files for the Verilog language, but also test the code, included the design and practical documentation.
traffic-light
- 一个交通控制灯的设计,用于十字路口,有倒计时功能,Verilog语言编写,Quratus II编译通过。-The design of a traffic control light for the intersection, a countdown function, Verilog language, Quratus II compile.
design-6-dof-robot-controller-FPGA
- 基于ATmega128和FPGA的六自由度机器人的直流伺服控制器设计-FPGA-based ATmega128 and six degrees of freedom robot servo controller design
verilog-Streamline-tutorial
- Verilog HDL 语言具有下述描述能力:设计的行为特性、设计的数据流特性、设计的结构 组成以及包含响应监控和设计验证方面的时延和波形产生机制。所有这些都使用同一种建模 语言。此外, Verilog HDL语言提供了编程语言接口,通过该接口可以在模拟、验证期间从设 计外部访问设计,包括模拟的具体控制和运行。-Has the following descr iption of Verilog HDL language ability: the behavior of the des
86verilog
- 以FPGA 芯片为平台构建了数字信号滤波实时处理模块, 给出了 50Hz 陷波器的切比雪夫Ê 型 IIR 数字 滤波器 4 阶级联的结构, 提出了对滤波器系数量化的逼近方法, 完成了基于 FPGA 的陷波器实现, 并成功地实现了 对含有工频 50Hz 噪声干扰的心电信号的滤波处理, 通过与M at lab 计算所得到的滤波处理效果进行比较分析, 结 果表明: 基于FPGA 采用切比雪夫Ê 型 4 级级联结构的 IIR 数字滤波器的误差满足设计要求- W ith t
VHDL_Elimination-of-key-jitter
- 基于VHDL语言下的消除键抖动程序设计,很简单易懂的-Elimination of key jitter
Verilog
- Verilog 数字系统设计教程 北京航空航天大学 夏宇闻 2004年版-Verilog Digital System Design Tutorial Beijing Aerospace University Press 2004 edition Yu Xia
ddr
- 基于FPGA的ddr控制器的设计与实现,verilog,ISE-FPGA-based controller design and implementation of ddr, verilog, ISE
firlms
- 基于FPGA的自适应FIR滤波器的verilog设计与实现-Adaptive FIR Filter Based FPGA Design and Implementation of verilog
linearcode
- 基于FPGA的线性编码解码,verilog设计实现-FPGA-based linear encoding and decoding, verilog design and implementation
waveform
- Verilog HDL数字系统设计项目,频率可调的任意波形发生器,可以输出正弦波、方波、三角波和反三角四种波形-Verilog HDL digital system design projects, adjustable frequency arbitrary waveform generator can output sine wave, square wave, triangle wave and the anti-triangular four waveform
Verilog-HDL-standard
- VERILOG的编码设计规范,使你的程序容易被理解,阅读和维护-VERILOG coding design specifications, to make your program easier to understand, read and maintain
eetop.cn_DDS_CORDIC_eetop
- 数字verilog设计数字算法CORDIC可以很好的为学生提供指导-Digital verilog design can be a good number of CORDIC algorithm to provide guidance for students
Verilog-HDLProgramming
- FPGA Verilog HDLProgramming FPGA设计电子书-FPGA Verilog HDLProgramming FPGA design books