搜索资源列表
WUSB_XILINX_FPGA
- WUSB Xilinx FPGA verilog source code
Using-JTAG-PROMs-for-data-storage
- Xilinx FPGA的配置中，从Flash中读写用户数据，包括VHDL、Verilog程序-in configuring Xilinx FPGA,reading and writing user data from flash,including the VHDL and Verilog code
rx_fifo
- verilog语言写的接收机FIFO，适用于xilinx环境-verilog language to write the receiver FIFO, the environment for xilinx
convert
- Program that convert verilog-file of Xilinx FPGA to PicoBlaze instactions-Program that convert verilog-file of Xilinx FPGA to PicoBlaze instactions
filer_pipeline
- 基于流水线的滤波器的设计与实现，verilog代码，xilinx，ISE，-Based on the assembly line of the design and realization of the filter, verilog code, xilinx, ISE,
XST-User-Guide
- 在Xilinx FPGA环境下，所有涉及的高级Verilog语言的语法都有讲到，还附有例子程序-In the Xilinx FPGA environment, all involved have a high-level Verilog language syntax mentioned, but also with an example program
-Elliptic
- We present elliptic curve cryptography (ECC) coprocessor, which is dual-field processor with projective coordinator. We have implemented architecture for scalar multiplication, which is key operation in elliptic curve cryptography. Our coproc
lcd_top
- 针对xilinx fpga开发用verilog写的lcd接口驱动，下载到板子上可以点亮LCD灯-Xilinx fpga for development verilog write with the LCD interface drive, downloaded to the board can light LCD lamp
ps_top
- verilog写ps2接口驱动程序，对状态机的描述。把键盘串行的13为数据转换为并行的8为数据，并储存在寄存器-The needle verilog write ps2 interface drivers, to the descr iption of the state machine. The keyboard for data transfer of serial and parallel for the 8 for data, and stored in a register to xi
MUX4x1
- Mux4x1 Verilog code for Xilinx Spartan 3E board
Decoder-3x8
- Decoder 3x8 Verilog code... This is for Xilinx Spartan 3E board
spartan3e_hdl
- xilinx公司开发板内部集成单元模块功能介绍以及VHDL，Verilog实现。-xilinx development board internal integrated unit module functional descr iption and VHDL, Verilog implementation.
FaceDetection
- 基于adoost的fpga人脸检测程序，代码采用了verilog编写，用的是xilinx的virtex5芯片-face detection based on adboost. verilog is used，and virtex5 it isimplementated on virtex5.
32_bit_mpu
- I got my semester project on IMPLEMENTATION OF 32 BIT MIPS processor and implementation on XILINX spartan 3e.i made thys code on verilog and includes LCD interfacing with the kit
gps
- Implement the GPS module time detection function via verilog language.-gps fuction module implemented in xilinx FPGA
ml605_PCIe_Gen1_x8_rdf0008_13.1_c
- ML605_Reference_Designs:ml605_PCIe_Gen2_x4_rdf0009,xilinx开发板的PCIe设计例程，包括源码和下载文件.verilog-ML605_Reference_Designs：PCIe codes and download files include ace and bit file
FPGA_Prototyping_Verilog
- 基于xilinx spartan 3的Verilog HDL开发详细的介绍以及实战，这本书没用枯燥的理论来讲述Verilog HDL而是用具体的芯片型号来演示Verilog HDL的强大-Development described in detail as well as actual combat, this book is useless boring theories about the Verilog HDL but with a specific chip model to demon
ad9854_z1_first
- ad9854的xilinx代码，verilog代码，调试通过的-ad9854 xilinx code, Verilog code, debugging through
PicoBlaze_Embedded_Template
- 基于xilinx的FPGA_partan3软核picoblaze的verilog程序，在picoblaze上pbus总线上挂有7段数码管，VGA，按键的驱动。-The xilinx the soft FPGA_partan3 nuclear picoblaze of verilog program in picoblaze pbus bus hang 7-segment digital tube, VGA button driven.
lcd
- lcd 1602 verilog ise xilinx-the lcd 1602 Verilog ise xilinx