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FPGA实现 LCD1602 显示 PS/2 键盘的键值,熟悉并掌握液晶 1602 显示屏的使用方法及PS/2键盘的接口标准，学习利用Verilog-HDL语言编写有限状态机实现较为复杂的设计与应用。-LCD1602 FPGA realizing that the PS/2 keyboard keys, familiar with and master the use of liquid crystal display 1602 method and PS/2 keyboard interfac
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VHDL语言编的一个空调控制系统。cpld实验中的代码-VHDL language a series of air-conditioning control system. the cpld experiments code
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对初学者学习硬件描叙语言有比较好的帮助，里面详细介绍了状态机的程序介绍-Hardware depicts the language better help for beginners to learn, which details the state machine program introduced
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vhdl用状态机方式实现交通灯功能,有原理图仿真结果···基于de2板验证-vhdl state machine approach to the traffic lights function and schematic simulation results verify de2 board
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用VHDL语言以及状态机实现五层电梯控制器。-VHDL language and the state machine to achieve the five-story elevator controller.
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采用状态机方法设计的交通灯控制器，添加了紧急状态，并且具有时间倒计时显示功能，VHDL源代码-a traffic light controller designed by State machine , a state of emergency is added, and a time countdown display, VHDL source code
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AD0804的控制程序，有VHDL和verilog两个方式。还有AD0804的介绍，和状态机控制-AD0804 control program, there are two ways to VHDL and verilog. There AD0804 introduction, and the state machine control
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上传的几个VHDL程序：分别是各种功能计数器；使用列举类型的状态机，四D触发器，通用寄存器，伪随机比特发生器，简单的状态机。-Upload several VHDL program: are the various functions of the counter using the enumerated type state machine, four D flip-flop, the general-purpose registers, pseudo-random bit generato
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向蜂鸣器发送一定频率的方波可以使蜂鸣器发出相应的音调
该实验通过设计一个状态机和分频
器使蜂鸣器发出"多来咪发梭拉西多"的音调。
-Sent to the buzzer frequency square wave of the experiment through the design of a state machine and divider buzzer sounded " more than a microphone Fat shuttle Rasi multi to
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基于VHDL语言的交通灯设计:通过状态机设计实现交通灯的红黄绿三种灯显示.其功能包括:红绿黄灯显示,倒计时功能,测试功能,手动控制功能.-Based on VHDL design of traffic lights: red, yellow, and green traffic lights, three lights through the state machine design features include: red, green, yellow, countdown function
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VHDL的各种基本代码
包括4选1,8选1多路选择器，8位全加器，加1减1计数器，序列检测器，异步清零16位加减可控计数器，数码管扫描程序，双2选1，状态机等基本程序！-VHDL basic code including 4 election 1,8 to 1 multiplexer selector, 8-bit full adder, plus 1 minus 1 counter sequence detector, asynchronous clear 16 plus or minus
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简单状态机数码管显示,Quartus II VHDL设计语言-Asimple state machine digital tube display, Quartus II VHDL design language
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vhdl环境下状态机实现的四层模拟电梯程序-environment under four simulated lift procedures vhdl state machine implemented
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Quartus2环境下基于VHDL状态机的交通灯程序-VHDL state machine traffic lights based on Quartus2 environment
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时序逻辑电路的习题,主要测试状态机以及ASM流程图的绘制-Drawing exercises sequential logic circuits, the main test state machine and ASM flowchart
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VHDL语言 有限状态机交通灯的设计 分频器模块的设计-Finite state machine design language VHDL design of traffic lights divider module
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包含本系列的第三部分内容，详细介绍了VHDL状态机的概念及其使用和16位CISC CPU设计。-The third part contains the contents of this series, detailing the concept and its use of 16-bit CISC CPU design and VHDL state machine.
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vhdl实例，包括vhdl的基本语法，还有众多触发器、状态机和一个小游戏的实现，是学习vhdl的绝好资料！-vhdl examples, including basic grammar vhdl, there are many triggers, the state machine and a small game to achieve, is to learn vhdl excellent information!
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这是用vhdl编写的状态机来实现对灯的控制。比较简单，但对于状态机的理解是更进一步。-It is written vhdl state machine to achieve control of the lamp. Is relatively simple, but for the state machine is further understood.
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完整可用的VHDL编写健身自行车控制系统的复杂状态机系统，使用ISE编写，在spartan6上实测通过-Complete exercise bikes available in VHDL state machine control system complexity system using ISE written by the spartan6 Found
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