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zzchufaqi
- vhdl 除法器 eda课程设计用。 设计一个两个五位数相除的整数除法器。用发光二极管显示输入数值，用7段显示器显示结果十进制结果。除数和被除数分两次输入，在输入除数和被除数时，要求显示十进制输入数据。采用分时显示方式进行，可参见计算器的显示功能。-divider vhdl eda curriculum design purposes. Design a two five-digit integer divider division. Enter the value with the lig
VHDL_decimal_settable_counter
- VHDL语言编写的简易十进制可调节计数器-A simple decimal settable counter using VHDL
huibian5
- 汇编实验：子程序设计。编程实现：十进制到十六进制的转换，显示结果到桌面！-Compilation of test: routine design. Programming: decimal to hex conversion, display the results to the desktop!
verilog_calculator
- 用verilog编写的简易计算器代码。通过一位全加器组成电路，可以实现加法、减法和乘法，并在七段数码管上显示出十进制的结果。-Simple calculator with code written in verilog. Composed by a full adder circuit, can add, subtract and multiply, and in the seven-segment LED display on the decimal result.
numberconversion
- 实现了十进制数与二进制、八进制、十六进制之间的转换-numberconversion
QQQ
- 用户输入2位的十进制数，以逗号为间隔，句号结束。程序找出最小数并显示出来。-The user to enter two decimal numbers, at intervals of a comma, period end. Minimum number of procedures to identify and display.
d
- 二进制转十进制。自行输入二进制，程序可以将其转化为十进制。输入的是无符号数。-Binary to decimal. Enter their own binary, the program can be converted to decimal. The input is unsigned.
liangshuxiangcheng
- 实现十进制数的乘法，被乘数和乘数均以ASCH码形式存放在内存中，乘 积在屏幕上显示出来。 -Implement decimal multiplication, the multiplicand and the multiplier are stored in memory ASCH code form, the product is displayed on the screen.
LIANGGESHIJINZHIXIANGJIA1
- 两个十进制相加 两个数 和 结果都在屏幕上显示出来-Add two numbers and two decimal results are displayed on the screen
Numchange
- 用C++做的数值转换，可以从十进制转换到二、八、十六进制，用栈结构做的-C++ to do with the value of conversion, you can convert from decimal to two, eight, hexadecimal, to do with the stack structure
zhuanhuan
- 要求从键盘输入一位十进制数，将这个数以二进制形式在屏幕上显示。 （提示：从键盘输入（1号调用）的数为十进制数的ASCII码，在AL寄存器中；为保证输入的为0到9之间的数字，需用2条CMP指令比较；在屏幕输出8位二进制数，采用循环LOOP指令，次数在CX中） -要求从键盘输入一位十进制数，将这个数以二进制形式在屏幕上显示。 （提示：从键盘输入（1号调用）的数为十进制数的ASCII码，在AL寄存器中；为保证输入的为0到9之间的数字，需用2条CMP指令比较；在屏幕输出8位二进制
4-10-VHDL-f1
- 四位10进制VHDL频率计设计说明 四位频率计的结构包括一个测频率控制信号发生器、四个十进制计数器和一个十六位锁存器（本例中所测频率超过测频范围时有警示灯）。-Four 10-digit frequency counter VHDL design descr iption of the structure of the four frequency meter includes a measuring frequency control signal generator, four deci
s
- 十进制五位数与五位数加法，可改为十进制各位数加法或者减法-Five-digit number with five decimal addition, you can change the number of decimal addition or subtraction
test
- 利用单片机AT89S51与ADC0809设计一个数字电压表，能够测量185－235V之间的直流电压值,并且在数码管上以十进制形成显示出来。-AT89S51 and ADC0809 microchip design a digital voltmeter, capable of measuring between 185-235V DC voltage, and in digital form on the display to decimal.
decimal_to_binary
- 将ASCII码表示的十进制数转换为二进制数-Will be expressed in decimal ASCII code is converted to binary
decimalconverttoBCD
- 求将缓冲区中存放的000CH的ASCII码转换成十进制数，并将转换结果显示在屏幕上-Stored in the buffer requirements 000CH the ASCII code into decimal, and convert the results displayed on the screen
heximalASC_convert_to_decimal
- 将十六进制数的ASCII码转换为十进制数-Hexadecimal numbers to decimal ASCII code conversion
Hex_conversion
- VB程序，多种进制之间的转换，包含十进制、八进制、十六进制和二进制之间的互转-VB program conversion between a variety of hex, including decimal, octal, hexadecimal and binary system conversion between
ZHISHU
- 从键盘输入（0-65535）的一个十进制数并且输出小于它的所有素数-From the keyboard input (0-65535) and the output of a decimal number less than all of its prime
a.asm
- 要求从键盘输入十六进制数转化成十进制输出，要有输入提示信息-Requires input from the keyboard into a decimal number in hexadecimal output, the input message must be