搜索资源列表
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- 基于FPGA的数字视频信号发生器的设计与实现，内有全套源码以及各种配套的图片，内容详尽，绝对真实！
ddszh
- 基于FPGA的DDS正弦信号发生器,信号失真小，频率稳定，可调-FPGA DDS shuzhi xinhao
FPGAPLLdesign
- 基于FPGA和PLL的函数信号发生器时钟部分的实现-FPGA+PLLdesign and practice
67506256DDS
- 基于FPGA 的直接数字频率合成信号发生器(DDS)设计-FPGA-based direct digital synthesizer signal generator (DDS) design. Pdf
EP1C3_12_10_PHAS
- 基于FPGA的移相式DDS正弦信号发生器的VHDL源代码，压缩包里是在Quartus里做的工程，FPGA用的是Cyclone1C3系列-FPGA-based phase-shifting of the DDS signal generator sine VHDL source code, compressed in the bag is done in Quartus Engineering, FPGA is used Cyclone1C3 Series
DDS
- 基于DDS原理的几种信号发生器的设计的几篇论文，使用FPGA平台或者FPGA和PC共同平台实现-DDS-based signal generator several principles of design, the use of FPGA or FPGA platform and a common platform PC
3
- 基于FPGA的任意信号发生器，毕业设计完整稿，适合做毕设的同学参考-FPGA-based arbitrary signal generator, a complete draft graduation project, suitable for students to complete reference
AWG1144
- 基于ARM的信号发生器FPGA的VHDL程序，可以实现频率调节到10M-ARM-based FPGA-VHDL signal generator procedure, can achieve frequency adjustment to 10M
dds
- 基于FPGA的DDS波形信号发生器，功能强大，代码规范，值得学习-FPGA-based DDS waveform signal generator, powerful, code specifications, it is worth learning
DDS__FPGA
- 基于FPGA的DDS信号发生器设计，包含Quartus 的工程，打开即可使用，Verilog 语言编写！-The DDS signal generator based on FPGA design, including the Quartus project, open to use, Verilog language! 朗读 显示对应的拉丁字符的拼音 字典- 查看字典详细内容
FPGA-multi-purpose-function-signal
- 基于FPGA的多功能函数信号发生器：基于FPGA实现直接数字频率合成，该函数信号发生器可以实现正弦波、三角波、方波、锯齿波等多种波形输出，输出信号的频率和幅度可调，利用单片机完成整个电路的时序控制、数据处理和实时显示输出。-Based on FPGA multi-purpose function signal generator: based on FPGA realizing direct digital frequency synthesis, this function signal ge
FPGA
- 基于FPGA的正弦信号发生器，该程序是由VHDL语言编程而成。-FPGA-based sinusoidal signal generator, the program is made by the VHDL programming language.
wf1
- dds信号发生器，基于fpga的信号发生器，拥有基本的功能，是本人亲自编写，具有良好的稳定性和健壮性！我喜欢这个代码-dds signal generator, signal generator based on fpga, with basic functions，
new
- 这是一个基于fpga的信号发生器，能产生三种不同的波形，经过测试运行稳定-This is an fpga-based signal generator can produce three different waveforms, tested and stable operation
dds20
- 基于FPGA的信号发生器，可实现任意波形输出，任意频率输出。-FPGA-based signal generator, arbitrary waveform output, the arbitrary frequency output.
signal_generator
- 基于FPGA的信号发生器的verilog实现-FPGA-based signal generator verilog implementation
dds(1)
- 基于DDS的信号发生器设计。DDS,FPGA,Verilog。(Design of signal generator based on DDS.DDS,FPGA,Verilog.)
SIN
- 基于fpga实现信号发生器，本设计采用方法为基于dds原理产生正线波信号输出。(DDS wave signal output line.)
verilog实现dds
- 基于FPGA实现信号发生器的的功能，较好的参考资料。(The function of signal generator is realized based on FPGA, which is a good reference.)
基于FPGA的多路同步脉冲发生器设计1
- 采用FPGA（现场可编程门序列）编写VHDL语言设计多路同步脉冲发生器，对信号进行分频处理，实现四路信号相位相差T/16和T/8的延迟相位输出，实现的四路脉冲与传统的脉冲同步器不同，它具有高集成度，高通用性，容易调整和高可靠性等特点。(Using FPGA (field programmable gate sequence) to write VHDL language to design multi-channel synchronous pulse generator, to divide