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multi8x8
- 该源码为8位乘法器的VHDL语言描述,由一个8位右移寄存器,2个4位加法器例化成8位加法器,一个16位数据锁存器构成。采用移位相加的方式,从被乘数的低位开始,与乘数的每个位移位相加求和。最后实现其乘法器功能。-The source code for the 8-bit multiplier in VHDL language to describe, from an 8-bit right shift register, two 4-bit adder example into 8-bit add
shifter
- 用vhdl语言采用时序电路(移位寄存器)的方式实现(7,4)循环码编码器-Vhdl language used by the timing circuit (shift register) way to achieve (7,4) cyclic code encoder
shifter_8bit
- 利用VHDL语言实现的8bit移位寄存器的设置,可以实现左移或者右移,全部工程都在rar里面,可以直接使用。-Using the VHDL 8bit shift register settings, you can achieve the left or right, all the works are in rar inside, can be used directly.
shift_reg_G
- 一个用定义行为的方法进行编程的移位寄存器的VHDL工程-The method used to define the behavior of a programming shift register VHDL project
adder_shifter_counter
- 用VHDL写的全加器,移位寄存器,和计数器,并有文档说明,非常详细。-Using VHDL write full adder, shift registers, and counters, and is documented in great detail.
vhdlll
- VHDL实现帧同步的巴克码器,含有移位寄存器,判决器、译码器。-VHDL realize frame synchronization barker code, contains a shift register, judgment, decoder.
yiweijicunqi
- 使用并置“&”法写出通用移位寄存器的VHDL模型。在时钟控制下将输入数据寄存,在满足输出条件时输出数据。-Use and set & method common shift register to write VHDL models. Under clock control the input data registers, the output data in the output condition is satisfied.
2
- 用VHDL语言设计一个8位双向可控移位寄存器。 移位寄存器由D型触发器构成,采用串入并出形式。 采用VHDL方式设计一个16х4位RAM存储器-VHDL language to design an 8-bit bidirectional shift register controllable. The shift register by a D-type flip-flops, using the string into and out of form. Way design using
serial_adder
- 串行加法器的vhdl描述,用两个移位寄存器和一个全加器,一个d触发器实现(The VHDL descr iption of the serial adder, with two shift registers and a full adder, a D trigger)