搜索资源列表
zwei
- 基于51的两个定时计数器合用的延时实验 （汇编）-51 Based on combination of the two timing counters delay Experiment (compilation)
cnt6
- vhdl,无进位同步计数器，完成6进制加，输出6进制序列数-vhdl, non-binary synchronous counter to complete the six binary Canada, output 6, the number of binary sequences
013jishu
- 一款自动计数器，程序，用于单片机实验板上。很强大的程序啊 -An automatic counter, procedures for the experiments on-board microcontroller. A very strong program ah
00t099CountAN
- 0-99的计数器，带proteus仿真文件。-0-99 of the counter, with proteus simulation file.
2cout10
- 二位十进制计数器，详细的代码和仿真，并且有VHDL代码和原理图设计-2 decimal counter, the detailed code and simulation, and has VHDL code and schematic design of
59count
- 基于89C52单片机的59秒计数器（C语言）适合初学者研究单片机应用-Based on 89C52 microcontroller 59 seconds counter (C Language) for Beginners Study of SCM application
cout60
- 用VHDL语言编写的60进制计数器，初学者使用-VHDL language with the 60 binary counter, for beginners to use
Infraredreflectivechannelcounter
- 红外线反射式通道计数器 （1）能够对通道内进出的人数进行统计； （2）当有人进入时自动加一，反之自动减一； （3）有效作用距离 〉20cm； （4）至少一位数码管显示。 -Infra-red reflective channel counter (1) be able to access statistics on the number of people inside and out (2) When someone entered automatically add o
ModifyInstruction
- 数字环路滤波器是由变模可逆计数器构成的。 该计数器设计为一个17 位可编程(可变模数) 可逆 计数器,计数范围是,由外部置数DCBA 控制-Digital loop filter is composed of variable-mode reversible counter. The counter is designed to a 17-bit programmable (variable modulus) reversible counter, counting range is s
counter6_t10jia
- 这是一个用VHDL编写的十进制计数器程序通过编译-This is a work written in decimal counter VHDL
8253
- 用于计数器实验，运行环境为Winxp Xingyan集成环境-For the counter experiments, operating environment, integrated environment for Winxp Xingyan
vhdl
- 100进制计数器的设计 -100 binary counter design
8sfdsd
- 用VHDL实现的八位可逆计数器，可作为交流学习使用。-VHDL implementation with eight reversible counter can be used as the exchange of learning to use.
ElectronicClockandsimulationwithVHDL
- 电子时钟VHDL程序与仿真。包括:10进制计数器设计与仿真,6进制计数器设计与仿真,24进制计数器设计与仿真.-Electronic Clock and simulation of VHDL program. Includes: 10 binary counter design and simulation, 6 binary counter design and simulation, 24 binary counter design and simulation.
chashengboceju
- AT89S52单片机控制的超声波测距，主程序首先对系统环境初始化，设置定时器T0工作模式为16位的定时计数器模式，置位总中断允许位EA并给显示端口P0和P2清0。然后调用超声波发生子程序送出一个超声波脉冲，为避免超声波从发射器直接传送到接收器引起的直接波触发，需延迟0.1ms(这也就是测距器会有一个最小可测距离的原因)后，才打开外中断0接收返回的超声波信号。由于采用12MHz的晶振，机器周期为1us,当主程序检测到接收成功的标志位后，将计数器T0中的数（即超声波来回所用的时间）按下式计算即可测得
mymcaculor
- matlab计数器，一个小程序，供学习者用-matlab counter, a small program for learners with
count100
- 用VHDL语言编写的100进制计数器，计数到99后清零-VHDL language with the binary counter 100, count to 99 after the clear
digital-frequency
- 数字频率计 采用Verilog语言编写，分为8个模块，分别是计数器，门控，分频，寄存器，多路选择，动态位选择，BCD译码模块-Digital frequency meter using Verilog language, divided into eight modules, namely, the counter, gated, frequency, register, multiplexer, Dynamic Choice, BCD decoding module
jishuqi
- 计数器，十进制计数器，完成计数的功能，满10进1-Counter, the decimal counter, the completion of counting functions, into a full 10
jishuqi
- 0-999计数器，51系列例程，带有实验说明文档。-0-999 counters, 51 routines, with the experimental documentation.