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verilog写的39阶通带为20KHz的半带fir滤波器,经测试正确。-verilog halfband FIR
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remez算法设计半带FIR滤波器,对半带滤波器,通带和阻带权值惩罚函数要相等-remez algorithm design half-band FIR filter
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FIRPM公园,麦克莱伦最佳equiripple FIR滤波器的设计。乙= FIRPM(不适用,女,甲)返回一个长度为N +1线性相位(真实,对称系数)FIR滤波器具有最佳逼近到所需的频率响应的F和描述在极小极大意义的。F是成对频带边缘载体,以递增0和1之间秩序。 1对应于奈奎斯特频率或采样频率的一半。至少有一个频段必须有一个非零宽度。 A是一个真正的载体,作为F的指定由此得到的滤波器的频率响应所需的幅度B相同大小- FIRPM Parks-McClellan optimal equirippl
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基于DSPbuilder搭建的DDC,里面包括CIC滤波器,FIR低通滤波器,HB半带滤波器,NCO等,实现了GC5016芯片的功能-DSPbuilder erected based on DDC, which include the CIC filter, FIR low-pass filter, HB half-band filter, NCO, etc. to achieve the function of the GC5016 chip
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半带滤波器是FIR滤波器的特殊情况,在软件无线电的变速率采样中有着广泛的应用,-Half-band FIR filter filters are special circumstances in the software radio has a variable-rate sampling of a wide range of applications,
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详细介绍了窄带滤波器的设计,如半带,CIC等原理,原理很详细-Details of the narrow-band filter design, such as half-band, CIC and other principles, the principle in detail
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采用MATLAB编程,产生一个16QAM基带信号,并进行实数倍插值计算。要求符号率为1 MSymbol/s,采用均方根升余弦滤波成形,滚降系数=0.5。产生{…1,0,1,1,…}的伪随机序列,经过映射、4倍成形滤波、FIR半带滤波、实数倍内插滤波,最后输出4.315倍时域/频域响应。给出信号序列经过各级滤波的时域、频域结果-Using MATLAB programming, resulting in a 16QAM baseband signal, and the real multiples
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级联优化的半带插值滤波器,分模块设计-Half-band interpolation filter cascade optimization sub-module design.
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基于FPGA开发的11阶半带升余弦FIR滤波器,用在阅读器基带滤波时的抽取滤波器使用,采用verilog语言实现。-Raised cosine FIR filter based FPGA development 11 order of half-band decimation filter used in reader baseband filtering, using verilog language implementation.
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半带有限冲击响应滤波器算法的matlab程序-half band fir filter algorithm
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一个OFDM 基带信号,采用256点IFFT,子载波采用8PSK映射,加保护段,调制信号采用“削顶”方法降低PAPR,FIR 半带滤波,最后输出时域信号/频域响应。包含各级的视频域比较-An OFDM baseband signal, using the 256-point IFFT, the sub-carrier using 8PSK mapping, plus the protection section, the modulated signal " cut top"
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多级半带滤波器的FPGA实现,采用6级滤波器实现的采样频率由3200Hz降为50Hz的抽取系统,前5级为半带滤波器,最后一级为普通FIR滤波器-Multi-level half-band filter FPGA, using six filters for sampling frequencies 50Hz down to 3200Hz extraction system for the front five and a half-band filter, the last stage of
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接收机中ddc的实现,包含CIC、半带和FIR滤波-DDC implementation in the receiver, including CIC, half band and FIR filter
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