搜索资源列表
lvds
- LVDS的FPGA实现,包括ISE工程和源码，还有一个pdf演示文档-FPGA implementation for LVDS
tset_freq
- FPGA 等精度测频程序源码，完整工程，cycolne 4-FPGA and other precision frequency measurement program source code, complete project
spi_4_2ch
- FPGA spi接口源码，可实现两个从机，扩展后可快速实现多从机，设置灵活，简单方便，有注释-FPGA spi interface source code, can achieve the two slaves, after expansion can quickly achieve multiple slaves, set flexible, easy to use, there is a comment
UART
- 用VHDL书写串口通信源码，在fpga上验证过-Serial communication with VHDL source code written in the fpga verified
comparator
- FPGA比较器源码编写，适合初学者参考用,用ALTERA的QUARTUS 11.0编译-Compare FPGA source code written for beginners reference, compiled by ALTERA s QUARTUS 11.0
I2C
- FPGA的I2C源码，基于Altera QUartusII的开发环境。-I2C-source FPGA-based Altera QUartusII development environment.
AES
- aes源码verilog带有仿真环境，可用于FPGA实现-aes verilog rtl
pka_engine
- rsa ecc加速器源码和仿真环境，用于fpga-rsa ecc rtl and sim
12_lcd_spi
- 用于FPGA开发板的LCD显示实验源码包，欢迎大家下载交流，有不周之处还望批评指点！-For FPGA development board LCD display experiment source package, welcome to download the exchange, there are ill also look criticism pointing!
VGA_test
- 基于FPGA的VGA显示源码，具体分辨率数据下板调试-Debugging FPGA-based VGA display the source code under the specific resolution data plate
serial_Verilog
- 特权同学的串口通信程序，Verilog语言，FPGA开发学习源码-Serial communication program, privileged students Verilog language, FPGA development learning source
VmodCAM_Ref_VGA_Split
- 双目视觉系统的FPGA实现；CMOS摄像头驱动，VGA图像显示；SDRAM控制器；调试成功；Diligient公司源码IP核-Binocular vision system on FPGA CMOS camera driver, VGA image display SDRAM controller
76
- FPGA的76个实用例程源码，适用于新手的快速入门-FPGA' s 76 practical routines source for novice Getting Started
12
- FPGA工程师成长手册源码，可以帮初学者很好的学习掌握FPGA的开发应用。-FPGA S
13
- FPGA工程师成长手册源码，可以帮初学者很好的学习掌握FPGA的开发应用。-FPGA S
vip_ex9
- 本段源码实现功能为从摄像头采集到VGA输出的FPGA代码，内附编译好的工程文件-This segment functions as a collection source implementation the camera to the VGA output of the FPGA code, containing compiled project file
ex15
- vhd数码管测试源码，同时六个数码管控制，显示。-using ALTERA s FPGA design, QUARTUS software development platform.
CLOCK-CODE-VHDL
- VHDL源码程序，功能完整的时钟电路代码-using ALTERA s FPGA design, QUARTUS software development platform.VHDL CARD,
miaobiao
- 使用VHDL\FPGA实现秒表的设计，包含所有源码。-Use VHDL\FPGA to achieve a stopwatch
fsmc_fpga
- STM32单片机与FPGA 总线通信源码，编译通过，有需要的拿去用-stm32 fpga fsmc source code