搜索资源列表
FIR32
- 基于DA算法的FIR带通滤波器设计,应用于FPGA实现,verilog语言描述-DA algorithm based on FIR bandpass filter design, used in FPGA implementation, verilog language to describe
DDS
- 基于FPGA的数字信号合成器(DDS),采用VHDL语言编写,能够实现正弦波、三角波、方波、锯齿波这四种波形的产生。 提示:最后输出的模块是串行DA,可根据具体情况更改驱动。-Digital synthesizer (DDS) based on FPGA, using VHDL language, to achieve sine wave, triangle wave, square wave, sawtooth waveform generation four. Tip: The la
ADtest
- FPGA与ADS822通信,控制ADS822采集波形,并通过DA输出显示-FPGA communicates with ADS822, control ADS822 waveform acquisition and output display by DA
da900
- FPGA控制DA芯片产生周期信号,用于简单测试芯片性能-DA chip FPGA control signal generation period, for the simple test chip performance
NCO
- 基于FPGA的DDS设计,通过外接DA转换器输出稳定的正弦波,方波和三角波,可单独产生时钟,不必借助硬件连接,包含寄存器程序,累加器程序和时钟发生电路等,以及顶层设计原理图-The DDS FPGA-based design, through an external DA converter output stable sine wave, square wave and triangular wave, can produce a single clock, without the help
DDS
- DDS的FPGA实现(VHDL),只可调频,调幅可于外部DA实现。(内附三角波、正弦波、方波的rom调用)-DDS on FPGA (VHDL), only FM, AM can be implemented in an external DA. (With triangular wave, sine wave, square wave rom call)
DA_TLC5620
- 这是用verilog写的基于FPGA的TLC5620串行DA的驱动代码,稍加修改后试用于通常的串行DA的驱动-This is a FPGA-based verilog write driver code TLC5620 serial DA, the latter slightly modified the trial in an ordinary serial DA driver
saopin_saveV2
- 在FPGA中利用DDS的原理实现了扫频功能并使用高速的AD采集数据,同时完成了数字峰值检波,并配合高速DA实现数据的输出-Use DDS principle in the FPGA to achieve the sweep function and use of high-speed data acquisition AD, while the completion of the digital peak detection, and with high-speed data output DA
DA_TLC5615
- 用FPGA控制DA芯片TLC5615实现数模转换,verilog语言-DA control with FPGA chip TLC5615 to achieve digital to analog conversion, verilog language
ADC_pf89
- 本verilog代码通过IIC总线实现了对 PCF8591AD、DA转换芯片的控制。适用于FPGA,亲测可用。-this is used for FPGA to control PCF8591(AD/DA) chip by verilog.
gensin
- 用fpga控制da发一定带宽正弦信号,用vhdl编写,用nco-Fpga controlled by a band-da made a sinusoidal signal, written in vhdl, with nco
DA_TLC5620
- FPGA之TLC5620:将所给程序下载到实验箱,观察现象并结合现象理解程序的含义,使其实现单通道的DA转换:在按下通道的按键之后,用数码管显示输入的数字量,停止按键,数码管计数停止,继续按键则继续计数,按下复位键,则系统清零,数码管显示零值。此程序基于Quartus的编程环境,采用Veilog语言编写。-FPGA tlc5620: to the program downloaded to the box observed phenomenon and combined with the phe
i2c_lightsensor
- 用Verilog HDL编写的光敏传感器AD/DA程序,AD结果显示在LCD上,DA结果控制LED的亮度,相关软件:ISE Design suit,硬件:xilinx FPGA开发板-Verilog HDL prepared with light sensors AD/DA program, AD results are displayed on LCD, DA of controlling LED brightness, software: ISE Design suit, hardware:
TLV5630ceshi
- TLV5630 DA转换芯片FPGA控制程序源代码,verilog编写-TLV5630 DA converter chip FPGA control program source code, verilog prepared
DA_TLC5620shiyan3
- FPGA实验DA tlv5620的实验程序-The experimental procedure DA tlv5620
ADDA_AX301
- 这是Fpga ax301内核的ad—da程序,可用-about ad-da(ax301)
ADDA_AX415
- 这个一个关于fpga(ax415内核)的ad-da-about ad-da
zonghe
- Quartus环境下编写的FPGA综合测试程序,能实现频率测量,数码管显示,12864液晶显示,1602液晶显示,点阵扫描显示,AD采样程序,DA输出电压程序,可以通过拨码开关控制上述功能的分别实现,还可以通过遥控器实现上述功能的控制实现。-Quartus environment prepared by the FPGA integrated test program, to achieve frequency measurement, digital display, 12864 LCD, 1
3M
- 在FPGA实验操作系统实现ASK,FSK,PSK的调制解调,基带信号由M序列发生器产生,经过AD模块在示波器上进行显示,精油DA模块在同一块实验板上进行解调操作,生成信号控制LED灯的亮灭,并与调制输出信号在示波器上同时展示,并进行对比。基带信号为3MHz。(In the FPGA operating system experiment implementation ASK, FSK, PSK modulation and demodulation of the baseband signal