搜索资源列表
ref-sdr-sdram-vhdl
- DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
sl361_schematic-gerber
- fpga-sdram开发板-sch,本原理图是xilinx公司s3系列开发板的sdram-- SDRAM development board - sch, the diagram is Xilinx companies s3 series of development board SDRAM
sdram
- sdram控制器 这里考虑将SDRAM控制器结合目前项目开展来做相应的模块,而不做SDRAM通用控制器,这样也是考虑了FPGA的器件资源而采取的措施。同时编写的逻辑简单,没有多余的逻辑资源有利于提高控制器的速度,满足最后的设计要求。-SDRAM controller here consider SDRAM controller current projects do the corresponding module, but not so common SDRAM controller, a
SRAM_2
- FPGA的SDRAM控制器源程序 FPGA的SDRAM控制器源程序-FPGA SDRAM controller source FPGA SDRAM controller source
ref-sdr-sdram-vhdl
- FPGA连接SDRAM的源程序,VHDL语言实现,功能基本完全。应用效果好。
FPGA
- SDRAM控制模块;图象采集系统说明性稳当;DSP图象采集系统。SDRAM作为存储器。
SDRAM
- 基于FPGA的SDRAM控制器的设计和实现,还比较好勒.
sdram4m16_L2_42
- 用FPGA实现SDRAM的操作,具体操作见内部说明文件-FPGA SDRAM with the operation of the specific see internal note
SDRAM_VerilogCode.rar
- 基于FPGA的SDRAM控制器Verilog代码,开发环境为Quartus6.1,控制SDRAM实现对同一片地址先写后读。,FPGA-based SDRAM controller Verilog code, development environment for Quartus6.1, control of SDRAM to achieve the same address one after the first time to write.
source_code.rar
- 一些源程序,主要包括CAN总线驱动、sdram VHDL实现、ucos2的移植、SDIO驱动、tcpip的实现、usb控制器代码、基于FPGA的雷达目标模拟器等,Some source code, including CAN bus driver, sdram VHDL implementation, ucos2 transplant, SDIO drivers, tcpip of implementation, usb controller code, based on the FPGA, s
sdram_hr_hw_4port
- FPGA控制SDRAM的源程序,SDRAM控制起来比较麻烦,时序复杂,本程序将其封装了一个模块,可以方便地调用.-FPGA to control the source of SDRAM, SDRAM control is too much trouble, the timing complexity of the procedure to package a module, you can easily call.
sdram-ctrl
- FPGA sdram 全页模式控制,用verilog语言写的,非常的精简,控制方便-FPGA sdram full-page mode control, written in verilog language is compact, easy to control
FPGA--SDRAM
- SDRAM:Synchronous Dynamic Random Access Memory- 同步动态随机存储器,同步是指 Memory工作需要同步时钟,内部的命令的发送与数据的传输都以它为基准;动态是指存储阵列需要不断的刷新来保证数据不丢失;随机是指数据不是线性依次存储,而是自由指定地址进行数据读写。
SDRAM
- FPGA上实现SDRAM初始化及控制源程序-Implemented on FPGA SDRAM initialization and control source
SDRAM controller
- This SDRAM controller is useful for SDR_SDRAM IC's can be integrated with the verilog code. The code is developed for the altera FPGA's and it can be ported to other FPGA's easily. The code is verified with terasic DE2-115 board and DE2 boards.
my_sdram_mdl
- 此功能为altera fpga 的sdram 控制器,串口接收与发送(This feature altera fpga sdram controller, serial port to receive and send)
SDRAM
- 在FPGA平台上运行,经过调试,是好使的,此程序能帮助使用者充分理解SDRAM的意义。(It is easy to run on the FPGA platform and be debugged. This program can help users fully understand the meaning of SDRAM)
SDRAM
- 基于fpga与verilog语言的的sdram读写(SDRAM reading and writing based on FPGA and Verilog language)
sdram_640X480_full
- 基于FPGA的640*480的sdram项目,使用verilog语言,教学项目教学项目(The SDRAM project of 640*480 based on FPGA, the use of the Verilog language, the teaching project teaching project)
SDRAM
- SDRAM编程代码,FPGA 的设计代码。(SDRAM programming code, FPGA design code.)