搜索资源列表
USB 2.0 IP Core
- USB20的IP CORE,可以直接用在SOPC下，自动完成全部的枚举，只需修改枚举参数即可！-USB20 IP CORE, can be directly used in SOPC, automatically complete the enumeration. only a modification of enumerated parameters can be!
8-bit-mcu-ip-core-design-and-verification
- 万方数据库中载的，关于IP核设计和验证方面的论文-popular database containing, for the IP core design and certification papers
PS2-IP-CORE-VHDL
- 一个PS2 IP CORE(VHDL) for FPGA
USB 1.1 IP-CORE和设计范例 VHDL源代码
- USB 1.1 IP-CORE和设计范例 VHDL源代码-Sample program for USB1.1 IP core design, VHDL source code
IP core
- VHDL ip core的设计，软核的设计方法-VHDL core of the design, soft-core design
turbo码 IP core
- turbo码 IP core, VHDL编写，Altera公司的，用于信道编码中turbo码的译码
ethernet IP core
- ethernet ip core,support100Mbps or 10Mbps
Altera IP Core
- 15 Altera IP Core
quartus 9.0 中FFT IP核的使用方法
- quartus 9.0 中FFT IP核的使用方法附带工程文件和用signaltapII抓到的波形,quartus 9.0 in FFT IP core attached to the use of engineering documents and the use of captured waveform signaltapII
USB.rar
- 用VHDL实现的USB IP核，大家可以参考下,Use VHDL to achieve USB IP core, we can refer to the following
usb11.rar
- 基于verilog HDL的一个USB 1.1的IP 核，内有详细文档说明。,Verilog HDL based on a USB 1.1 of the IP core, which has detailed documentation.
USB2.0IP.rar
- 完整的用VERILOG语言开发的USB2.0 IP核源代码,包括文档,Complete Verilog language developed by USB2.0 IP core source code, including documentation
Altera_8051_IPcore_v1.2.rar
- Alera 的8051 IP core的示例文件5个,Alera the 8051 IP core of the sample file 5
FSK
- 利用FPGA内的IP核来实现FSK，Using FPGA to realize the IP core FSK。-Using FPGA to realize the IP core FSK,
can.rar
- can IP CORE .VERY GOOD AS A STUDY FILE,can IP CORE. VERY GOOD AS A STUDY FILE
fft_verilog.rar
- FFT IP core 源码 状态控制机,FFT IP core
15-IP-core
- 15个免费的IP核 IP核源代码 -15 IP cores
ethernet10-100M-IP-core
- 以太网10-100M IP核Verilog源码，可综合-Ethernet 10-100M IP core Verilog source code can be integrated
USB-1.1-IP-CORE-VHDL
- USB1.1标准接口的IP核的实现和其设计实现的源码范例VHDL-USB1.1 standard interface IP core implementations and examples of their design and implementation of the VHDL source code
vhdl-fft-core
- FFT ip core，fft信号处理模块， VHDL语言编写-FFT ip core