搜索资源列表
NiosII-4
- 这是一ALTERA公司的培训内容,大家看看了,尤其参加SOPC竞赛的-Altera Corporation contents of the training, we look at, especially to participate in the contest SOPC
uCOS_II_for_Nios
- uCOS_II 在NiosII处理器上的移植过程以及全部源代码。-uCOS_II Nios II processors in the transplant process and the full source code.
XNLparser
- xml解析器(在niosII环境下用C语言开发的)-xml parser (niosII environment with C-language development)
CYCLONEIISCH
- ALTER公司CYCLONEII系列NIOSII开发板原理图,32位可裁减资源单片机在片设计。-ALTER company CYCLONEII series NIOSII development board diagram, 32 MCU resources can be trimmed in film design.
niosII
- 这是关于串口中断的程序,感兴趣可以下载,作为技术交流-this is about interrupt the proceedings, interested can download as a technology exchange
Nios_SW_Tutorial_Cyclone_1C20
- 包括基于Cyclone1C20芯片NiosII软件开发的各种模块的测试例子,开发环境是基于NiosII IDE的,实际上就是eclipse开发-including chip-based Cyclone1C20 NiosII software modules developed by the test cases son, the development environment is based on NiosII IDE, in fact, is the development of eclip
NiosII_software_tutorial
- NiosII的软件开发手册,包括了niosII IDE开发环境的介绍,HAL系统库的介绍以及使用HAL进行程序开发-NiosII software development manuals, including the development environment IDE niosII presentation HAL system for the introduction and use of the procedures for the development of HAL
pwm_source
- ALTERA PWM電路 這是一個ALTERA的PWM電路,可以整合到NIOSII IDE中,來完成一個PWM的系統。-Altera PWM circuit Altera This is a PWM circuit, NIOSII can be integrated into the IDE, to complete a PWM system.
VGA_control_verilogHDL
- 基于FPGA的VGA控制器设计。对外支持普通VGA接口,以600×480的分辨率和60Hz扫描率为例。对内支持NIOSII软核接口。
vga.niosII.compent.v
- 在cyloneIIFPGA平台下设计完成测试通过的VGA控制器代码。显存留在系统的SDRAM中,用FIFO作为缓冲。-in cyloneIIFPGA platform design is completed tests through the VGA controller code. RAM in the system SDRAM, and use as a FIFO buffer.
uclinux.vga.driver
- UCLINUX2.6核下的vga驱动。基于framebuffer机理。硬件设计采用基于FPGA的软核NIOSII设计。-UCLINUX2.6 the upper vga driver. Based on the mechanism of the framebuffer. Hardware design using FPGA-based soft-core NIOSII design.
HDLCControlSystem
- 基于Altera公司NiosII嵌入式处理器开发的一个控制系统模型,用QuartusII和VB完成,利用串口实现了PC与Altera_DE2开发板之间通信,DE2反馈信息,PC进行控制操作。本设计获陕西省06年大学生电子设计大赛二等奖。-based Altera Corporation NiosII embedded processor development of a control system model, QuartusII and use VB completed, Use Seria
NIOSIIFLASHStep_by_step
- 将NiosII程序下载到Flash的方法(Step_by_step).pdf-NiosII procedures will be downloaded to the Flash (Step_by_step). P df
niosII_uart
- 基于NIOSII的UART的原代码,可以直接运用。可以方便的和其他具有UART的设备无缝连接。 -based on the UART NIOSII the original code can be directly applied. Can facilitate the UART and other equipment seamless connection.
leon3-altera-ep2s60-ddr
- This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOT
hello_led
- niosII的一个例子!NIOSII是ALTERA出的一个软核处理器,可定制组件,可随时更改设计而不需要修改线路板!
NiosII
- 一些关于Nios II学习的好资料,很适合初学者
Audio_DAC_FIFO
- altera的ip核,在sopcbuilder中添加后,在niosII IDE中可以用一条语句实现,音频解码的输出。
NiosIIexample
- NIOSII的7个c语言源码,是7个例子,分别在niosII IDE环境下实现,不同的功能。是基于altera的标准c,目前资源较少。
DM9000A
- altera的ip核,在sopcbuilder中添加后,在niosII IDE中可以轻易实现对dm9000a网卡的控制。