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arm_command
- ARM(Advanced RISC Machines)是微处理器行业的一家知名企业。设计了大量高性能、廉价、耗能低的RISC处理器、相关技术及软件。1985年,第一个ARM原型在英国剑桥诞生。ARM公司的特点是只设计芯片,而不生产。ARM将其技术授权给世界上许多著名的半导体、软件和OEM厂商,每个厂商得到的都是一套独一无二的ARM相关技术及服务。利用这种合伙关系,ARM很快成为许多全球性RISC标准的缔造者。-ARM (RISC Machines Advanced) is a well-know
cpu
- 一份精简指令cpu源代码,用verilog编写,已经通过仿真验证,可以模块化移植。-This is a file of cpu code. The cpu is risc cpu. It is simulated and verificated.And the cpu can be transplanted as a module.
Risc128
- 128 bit RISC processor implementation in verilog
ATmega16_CN
- The ATmega162 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega162 achieves throughputs approaching 1 MIPS per MHz allowing the system d
ATmega162_cn
- 将ATmega162双串口串联起来,通过PC串口向单片机发送数据,单片机接收数据后再送回PC机-The ATmega162 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture.
ATmega328P_AVR
- 8位 微控制器 具有4/8/16/32K 字节的系统 可编程 -5 8161D–AVR–10/09 ATmega48PA/88PA/168PA/328P The ATmega48PA/88PA/168PA/328P is a low-power CMOS 8-bit microcontroller based on theAVR enhanced RISC architecture.
RISC_cpu
- 一款8位的RISC-cpu 源码可在modelsim仿真出波形-An 8-bit RISC-cpu source code in modelsim simulation waveforms
S16C57
- 8位RISC CPU 设计IP,包含了文档、代码、仿真环境等-8BIT RISC MCU implemention reference ip,include rtl code,simulation and document
arm4u_latest.tar
- DESIGN OF A DYNAMICALLY RECONFIGURABLE PIPELINED RISC PROCESSOR
f32c-master
- FPGArduino源码,f32c:VHDL的MIPS和RISC-V指令集实现(FPGArduino source code, f32c:VHDL MIPS and RISC-V instruction set implementation)
ARMTXJGYBC
- 十分全面的介绍了ARM 平台的指令集,如何学习操作arm寄存器有着十分具体的讲解(ARM is a leader in microprocessor Intellectual Property. ARM designs and licenses fast, low-cost, power-efficient RISC processors, peripherals and 'system.)
axi_ipif_v2.3
- The AXI4-Lite IP Interface (IPIF) is a part of the Xilinx family of Advanced RISC Machine (ARM) Advanced Microcontroller Bus Architecture (AMBA) Advanced eXtensible Interface (AXI) control interface compatible products. It provides a point-to-point
eetop.cn_AMBAAHBimportant
- ARM研发的AMBA(Advanced Microcontroller Bus Architecture)提供一 种特殊的机制,可将RISC处理器集成在其它IP芯核和外设中(Advanced Microcontroller Bus Architecture)
msp430g2553
- 德州仪器(TI) MSP430 系列超低功耗微控制器包含多种器件,它们特有面向多种应用的不同外设集。这种架构与 5 种低功耗模式相组合,专为在便携式测量应用中延长电池使用寿命而优化。该器件具有一个强大的16 位RISC CPU,16 位寄存器和有助于获得最大编码效率的常数发生器。数字控制振荡器(DCO) 可在不到1μs 的时间里完 成从低功耗模式至运行模式的唤醒。(The TI (TI) MSP430 family of ultra low power microcontrollers c
freedom-master
- This is a feedom master version of the RISC-V core and can be used with LGPL license
rocket-chip-master
- rocket chip is RISC V implementation documentation ISA instruction set architecture et cetra
manual
- The ARM7 is a low-power, general purpose 32-bit RISC microprocessor macrocell
minirisc-master
- Implementation of the MiniRisc CPU in Verilog!
Chapter4
- MIPS is a reduced instruction set computer (RISC) instruction set architecture (ISA)[1]:A-1[2]:19 developed by MIPS Technologies (formerly MIPS Computer Systems). The early MIPS architectures were 32-bit, with 64-bit versions added later.
Chapter8
- The architecture greatly influenced later RISC architectures such as Alpha. As of April 2017, MIPS processors are used in embedded systems such as residential gateways and routers.