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sha_core
- 安全散列函数的VERILOG实现，通过了fpga验证，在系统正可以直接当IP盒应用-Secure Hash Function VERILOG achieve, through the FPGA verification, the system is can be directly applied when the IP box
sha256_512
- Verilog实现的SHA256/SHA512算法，已仿真和验证-Verilog implementation of SHA256/SHA512 algorithm, simulation and verification has been done.
sha_core_latest.tar
- 利用verilog实现的SHA1以及SHA2中的SHA256和SHA512-Use verilog to achieve the SHA1 and SHA256 and SHA512 SHA2
SHA256
- 该文件提供了哈希函数资料及代码实例，以供大家参考。(The file provides hash function data and code examples for your reference.)
SHA256_SYSTEM
- 利用硬件（可编程逻辑器件FPGA）实现密码算法SHA256，在FPGA中嵌入软核NIOSii，在NIOSii上进行软件编程。 硬件EDA工具为ALTERA的Quartus ii，软件IDE为eclipse（嵌在Quartua中）。(The hardware (programmable logic device FPGA) is used to implement the cryptographic algorithm SHA256, and the soft core NIOSii is em