搜索资源列表
ad9777的测试程序，对SPI进行初始化，运用ISE环境，成功地进行综合和实现.rar
- ad9777的测试程序，对SPI进行初始化，运用ISE环境，成功地进行综合和实现
SD控制器和SPI控制器
- 基于fpga的verilog 收到卡读写程序
spi slave
- SPI 接口的VHDL和Verilog实现。slave模式
mcu-cpld-spi.mcu与cpld之间spi接口程序
- mcu与cpld之间spi接口程序，mcu为master，cpld用verilog写成slave模块,mcu with spi interface program between the CPLD, mcu for the master, cpld written using Verilog slave module
SPIBusVerilog.rar
- SPI串行总线接口的Verilog实现，详细讲解实现过程。,SPI serial bus interface Verilog realization elaborate on the realization of the process.
SPI_AT45DB041B.rar
- 用verilog编写的SPI程序,SPI芯片是AT45DB041B.文件内包含程序仿真时的截图.包括read和wirte.,SPI prepared using Verilog procedures, SPI chip AT45DB041B. Document contains procedures for simulation screenshot. Including read and wirte.
ssp_arm.rar
- arm 的ssp—spi verilog源代码,arm of the ssp-spi verilog source code
SPI
- Verilog SPI 源码（来自网络）-Verilog SPI
spi
- Verilog语言写的SPI接口（层次化设计，便于升级）-The implememt of SPI interface using Verilog HDL
QUAD-SPI-verilog
- 难得的SPI NOR Flash控制器Verilog源代码，支持四路串行通道！-Rare SPI NOR Flash controller Verilog source code, supports four serial channels!
wince+spi
- verilog vcspi file with testbench
spi.tar
- This is a verilog code used oversampled clock to implement SPI slave. Also include C code for a ARM processor as the SPI master-This is a verilog code used oversampled clock to implement SPI slave
spi
- SPI Verilog code with programmable clock
rtl
- SPI verilog RTL code
spi
- SPI IP CORE Verilog quartus-SPI IP CORE Verilog quartusii
SPI
- SPI verilog 代码 有代码和TB 以及文件说明-SPI verilog
verilog-SPI-core
- 用VerilogHDL写的spi 核的例子-A simple example of SPI core using Verilog HDL
Nitro-Parts-lib-SPI-master
- Nitro-Parts-lib-SPI Verilog SPI master and slave
SPI
- SPI（Serial Peripheral Interface，串行外设接口）是Motorola公司提出的一种同步串行数据传输标准，是一种高速的，全双工，同步的通信总线，在很多器件中被广泛应用。 SPI相关缩写 SS: Slave Select，选中从设备，片选。 CKPOL (Clock Polarity) = CPOL = POL = Polarity = （时钟）极性 CKPHA (Clock Phase) = CPHA = PHA = Phase = （时钟）相位
SD SPI模式verilog外加modelsim仿真结果
- SD卡的SPI模式verilog代码，外加modelsim仿真结果。(SD card's SPI mode Verilog code, plus the simulation results of modelsim.)