搜索资源列表
基于vhdl的四路智能抢答器
- 基于vhdl语言的四路只能抢答器源代码程序
qiangdaqi.rar
- 四人抢答器设计,具有超前抢答显示报警，20秒倒计时超时抢答报警及加分、减分等功能,Answer four design, with advance Answer show alarm, countdown to 20 seconds of overtime Answer alarm and extra points, reducing the classification function
vhdlCompetition.rar
- 用VHDL设计四人抢答器,vhdl学习的基础，很好用,vhdl competition
vhdlcpld.rar
- 用vhdl实现四人智能抢答器，强大成功，显示抢答号。超时没有人回答，有报警提示。,Using vhdl implementation of four smart Responder, strong success, showing to answer in number. Out that no one answered, there is alarm.
zhiliqiangdaqi
- 可以供四组人员进行操作的智力抢答器，当一次抢答完成后可以复位继续进行抢答，当抢答成功时会显示号码并响铃-Be available for four groups of personnel to operate the intellectual Answer, and when after the completion of an Answer to Reset Answer to continue, when the Answer success will show number and rin
qdqsjyxqfx
- 抢答器设计与需求分析，抢答器设计与需求分析-Answer Design and needs analysis, design and demand Answer Analysis
environment
- VHDL开发环境，四人抢答器，实现了四个人能同时抢答的功能。-VHDL development environment Answer four, and the realization of the four functions at the same time Answer.
wodeshji
- 在FPGA上，实现了一个多功能数字抢答器，设置四个抢答按钮，及若干控制台按钮，有计分，抢答，重置，及时等功能-In the FPGA, the realization of a multi-functional digital Answer, and set up four Answer button, and a number of console button, there are points, Answer, replacement, and other functions in tim
4answermachine
- 4人抢答器的一个程序。。功能比较简单，希望对大家有帮助-Answer a procedural device. . Function is relatively simple, we want to help
5personsanswerdevice
- (1) 抢答器线路测试功能:为了保证比赛的正常进行，比赛前需要调试线路能否正常工作。(2) 第一抢答信号的鉴别和锁存功能:可以判断谁最先抢到回答的资格，其相应的绿灯表示抢答成功，并具有锁存功能，一直到下一题开始。(3) 犯规警示功能:可以判断出参赛者有没有在主持人读题的期间按下抢答器，有则相应的红灯亮，同时取消其本轮抢答资格。(4) 计时功能可以预置时间，可以进行倒计时并且将时间显示出来,还有最后十秒警示功能。(5) 计分功能:可以实现加分，并且显示出来。 -5persons answer
answeringdevice
- 四人抢答器，本设计室根据抢答器的原理，用vhdl语言写的。具有很强的实用价值。-Four Responder, this Responder Design Studio, according to the principle, using vhdl language written. Has a strong practical value.
qdq
- （1）用于竞赛强大的四人抢答器 （2）抢答开始后20秒倒计，倒计结束后无人抢答显示超时 （3）能显示抢答台号 （4）系统复位后进入抢答状态，能显示犯规警报-(1) is used to contest a powerful four Responder (2) to answer in 20 seconds after the start of countdown, countdown display time-out after no one to answer in (3) ca
vhdl
- 抢答器的vhdl设计 设计任务： （1）设计一个可容纳4组参赛的数字式抢答器，每组设一个按钮，供抢答使用。 （2）抢答器具有第一信号鉴别和锁存功能，使除第一抢答者外的按钮不起作用。 （3）设置一个主持人“复位”按钮。 （4）主持人复位后，开始抢答，第一信号鉴别锁存电路得到信号后，由指示灯显示抢答组的编号，同时扬声器发出2~3秒的音响。 扩展功能： （5）设置一个计分电路，每组开始预制100分，由主持人计分，答对一次加10分，答错一次减10分。 计要求： （1
qiangdq
- 用vhdl编写的抢答器程序，用FPGA来实现仿真、应用。适合于初学者-Responder using vhdl written procedures to implement using FPGA simulation applications. Is suitable for beginners
qdq
- 用vhdl实现的抢答器，能实现20秒抢答倒计时，犯规报警，重置，计分功能。-Responder using vhdl implementation, can achieve 20 seconds to answer in the countdown, fouls alarm, reset, scoring functions.
qiangda
- EDA课程设计智力抢答器 四路抢答器的设计以及程序和视屏 软件运行环境是：Quartus 9.1-EDA curriculum design intelligence Responder four answering device design and process and Screen software operating environment is：Quartus 9.1
qiangdaqi
- 抢答器，用vhdl语言编程，在fpga平台上实现。-Responder, with the vhdl language programming, in fpga platform to achieve.
vhdl
- 这是基于VHDL设计的抢答器 通过抢答者的指示灯显示、数码显示和警示显示等手段指示出第一抢答者-This is based on VHDL design Responder Responder' s light show through a digital display and warning display means of the First Responder who directed
VHDLqiangdaqi
- VHDL四路抢答器该任务分成七个模块进行设计，分别为：抢答器鉴别模块、抢答器计时模块、抢答器记分模块、分频模块、译码模块、数选模块、报警模块，最后是撰写顶层文件。-VHDL four Responder divided into seven modules of the design task, namely: Responder identification module, timing module Responder, Responder scoring module, frequency
ANSWER
- 采用VHDL设计的抢答器，抢答时间10秒钟，10秒内无人抢答，则抢答按键失效。显示抢答的队伍号。适合做课程设计。-Design using VHDL Responder, Responder for 10 seconds, no answer in 10 seconds, then the answer in key failure. Display answer in team numbers. Suitable curriculum design.