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eathnet
- 百兆以太网mac和mii的vhdl源程，作IPcore的时候非常有用-Fast Ethernet MII and the VHDL source way for IPcore very useful when
EthernetPHY
- Ethernet物理层收发代码，vhdl语言所写，关于mii接口的
smii-to-mii
- SMII 到 MII 转换的VHDL代码
目前以太网PHY芯片是通过总线MDC/MDIO
- 目前以太网PHY芯片是通过总线MDC/MDIO，但是基本上是通过MAC芯片直接管理的，本代码实现了通过FPGA管理PHY。即由FPGA完成MII管理,At present, Ethernet PHY chip through the bus MDC/MDIO, but basically through the direct management of MAC chip, the code through the FPGA implementation management PHY. FPGA
ETH
- 该系统通过顶层模块，调用4底层模块实现。4大模块底层模块为：cpu模块、发送模块、接收模块、mii模块-The system top-level module, called the bottom module 4. 4 large modules underlying module: cpu modules, transmit modules, receiver modules, mii module
rmii2mii
- Converter interfaces RMII-MII
MII
- 以太网MII芯片配置接口的VHDL设计，配置PHY芯片的模块设计-Ethernet MII chip configuration interface VHDL design, configuration PHY chip module design
com1600template_002f
- VHDL source code of 1600 M-VHDL source code of 1600 MII