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taxibillingsystemVerilog
- 在Quartus II 5.0环境下，开发此出租车计费系统，可以对出租车的不同情况计费，精确至0.5元-In Quartus II 5.0 environment, the development of the taxi billing system can be of different situations on the taxi billing, accurate to 0.5 yuan
ds18b20
- ds18b20的介绍及时序，以及对ds18b20进行温度读写的vhdl程序，在quartus环境下进行编译仿真-Introduction ds18b20 and timing, as well as read and write ds18b20 temperature vhdl procedure quartus compiled simulation environment
lpf
- 实现低通采样功能的vhdl代码，可在quartus里运行。-The achievement of low-pass function vhdl sample code can be run in quartus.
TC221FPGA
- TCC221图象传感器和FPGA实现图象采集 开发环境是quartus-TCC221 camera and FPGA to get a picture
Elevator
- 基于FPGA的6层电梯控制器，使用VHDL编程，用quartus ii进行仿真模拟-Elevator Controller
addDisplay
- 四人抢答器，用quartus编译过的，vhdl语言，说明详细，欢迎各位下载，-add display led
EP1C3_12_1_2_MOTO
- 基于FPGA的直流电机的PWM控制和步进电机的细分驱动控制。使用VHDL语言编写，压缩包里是Quartus下的工程。-FPGA-based PWM DC motor control and stepper motor-driven control of a breakdown. The use of VHDL language, compression bag is under the Quartus project.
pll
- 是quartus2的仿真倍频电路，用于产生倍频时钟！-Is a multiplier circuit simulation quartus
stopwatch
- Quartus II工程压缩文件，是一个典型的基于FPGA的秒表工程项目，有50MHz分频、计数、译码等模块。采用VHDL语言编写。-Quartus II project files, is a typical FPGA-based project of the stopwatch, a 50MHz frequency, counting, decoding modules. Using VHDL language.
miaobiao
- 秒表功能，自带工程，EDA的设计平台QuartusⅡ-Stopwatch functions, bring their own works
web
- 模拟网络串行通信 近期对计算机间通信比较感兴趣，同时研究usb通信原理，起步为串行通信于是想为更好地理解其机理做一定基础性研究，故做了异步串行通信设计实验。 经过QUARTUS验证，获得了一等奖！-Simulation of the recent serial communication network between the communication of more interested in computers, communications usb at the same time
usb-blaster
- quartus多种USB-bletera 自制下载线！
intro_to_quartus2_chinese
- 详尽的quartus中文版介绍，使用方法，技巧等-failed to translate
quartus
- des algorithm send rx from serial port
4_bit_division
- 4位除法器,文件内容为QUARTUS II支持的VHDL语言，用于做四位除法-4_bit_division
quartus
- quartus中常见错误的解析以及解决办法，主要是VHDL也verilog HDL-Common Errors in quartus and the analytic solutions is mainly VHDL also verilog HDL
XYJ
- 洗衣机控制程序，只需在QUARTUS中编译即可使用-washing machine controler
1
- FIR的FPGA实现及其Quartus Ⅱ与MATLAB仿真 FIR的FPGA实现及其Quartus Ⅱ与MATLAB仿真-The FPGA realization of FIR and its Quartus Ⅱ and MATLAB simulation FIR realization of the FPGA and Quartus Ⅱ and MATLAB simulation
lpm_ram
- 一个基于quartus的LPM_RAM例子，VHDL语言写的，通过仿真测试-Quartus the LPM_RAM based on examples, VHDL language, and through simulation testing
filter_vhdl
- vhdl语言编写的fir和iir滤波器程序。在quartus上仿真通过。-vhdl language program fir and iir filters. Quartus adopted in the simulation.