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jishuqi.rar
- 描述的是一个带有异步复位和同步时钟使能的十进制加法计算器,,With reset and clock enable decimal calculator
用VHDL编写的计算器
- 用VHDL编写的计算器：能实现简单的加减乘除四则运算 ,Prepared using VHDL Calculator: able to achieve simple addition and subtraction, multiplication and division 4 computing
calculator
- 用VHDL在quartus2下实现的计算器。输入为4*4矩阵键盘，输出为共用数据线的数码管。可以实现简单数学运算、逻辑运算、进制转换、连续运算等功能。-Using VHDL in quartus2 achieve calculator. Input 4* 4 matrix keyboard, the output data lines for sharing of digital control. Can achieve a simple mathematical operations, log
VHDL语言写的简易计算器
- 用VHDL写的简易计算器，包括加减乘除，除法器用加法器和乘法器组成-Write simple calculator with VHDL, division, including add, subtract, multiply and divide adder on time-multiplier and used
calculator
- VHDL编写计算器，功能包括：加，减，乘，除。通过keypad输入及输出-Calculator written with VHDL
MultipleNumbersCalculator
- Multiple Numbers Calculator (source code and LAB notes)
61EDA_D1051
- 用VHDL编写的计算器：能实现简单的加减乘除四则运算-Prepared using VHDL calculator: to achieve simple addition and subtraction, multiplication and division four computing
erwertwerwe
- 用VHDL编写的计算器：能实现简单的加减乘除四则运算-Prepared using VHDL calculator: to achieve simple addition and subtraction, multiplication and division four computing
jisuanqi
- 用VHDL语言实现通用计算器设计，MUXPLUS2软件仿真验证-Implementation using VHDL language design generic calculator, MUXPLUS2 software simulation to verify
NewFolder
- calculator program is a good program
shifter
- 移位运算器SHIFTER 使用Verilog HDL 语言编写，其输入输出端分别与键盘/显示器LED 连接。移位运算器是时序电路，在J钟信号到来时状态产生变化， CLK 为其时钟脉冲。由S0、S1 、M 控制移位运算的功能状态，具有数据装入、数据保持、循环右移、带进位循环右移，循环左移、带进位循环左移等功能。 CLK 是时钟脉冲输入，通过键5 产生高低电平M 控制工作模式， M=l 时带进位循环移位，由键8 控制CO 为允许带进位移位输入，由键7 控制:S 控制移位模式0-3 ，由键6 控制
subadd
- 一个四位二进制加/减运算器。 要求：当控制端G＝0时做加运算，G＝1时做减运算。用发光二极管表示运算结果的正、负。用数码管显示运算结果：加运算时，相加之和不超过15，减运算时，结果可正可负，但都用原码表示。-Plus a four binary/by calculator. Requirements: When the control terminal G = 0 when computing increases, G = 1 when computing reduced. Computin
calculator_vhdl
- Design PC calculator controlled by PC, using FPGA .PC and FPGA are connected by USB. -Design PC calculator controlled by PC, using FPGA .PC and FPGA are connected by USB.
yetert
- This package includes 4-bit calculator designed in Xilinx FPGA 10 using VHDL. This calculator contains 3 registers, 1 ALU, 1 decoder and 1 FSM (finite state machine).
calculadora.v.tar
- basic special calculator for begginer students of electrical engineerings
ALU_VHDL_code
- ALU逻辑运算单元计算器的VHDL源代码，已通过FGPA验证，绝对正确。-ALU ALU calculator VHDL source code has been verified by FGPA absolutely correct.
dp1sol
- Simple Binary Calculator
Calculator_altera
- 简易计算器，采用VHDL编写，能进行加减运算-Simple calculator, using VHDL writing, addition and subtraction operations can be carried out
exercicio4
- VHDL program. Calculator that do basic operations. Add, subtract, divide and multiplication using Cyclone -VHDL program. Calculator that do basic operations. Add, subtract, divide and multiplication using Cyclone II
Calculator
- VHDL计算器，涉及PS2输入，VGA视频输出，加法器，BCD转化。可以通过研究代码学习以上知识-VHDL calculator, involving PS2 input, VGA video output, the adder, BCD transformation. You can learn more knowledge through research code