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VHDL语言的UART串行接口芯片程序
- VHDL语言的UART串行接口芯片程序
UART.使用FPGA的FIFO，状态机
- 使用FPGA的FIFO，状态机，乒乓操作等实现了异步UART。,The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.
uart.rar
- VHDL语言编写的全功能串口模块（包含DTR，RTS等管脚），在CPLD器件上测试通过,VHDL language, full-featured serial modules (including DTR, RTS pin, etc.), in the CPLD device test
uart.zip
- uart串口通信程序，用状态机实现的；测试通过，并且实践过,uart
uart
- 采用VHDL语言编写的串口驱动程序，已调试通过，能够实现同PC机的数据传输，可读性好，可移植性好-VHDL language using the serial driver has been debugged, to achieve the same PC, the data transmission, readable and portable
uart
- uart的vhdl实现，包含完整quartus工程文件，相信会有较大帮助-uart vhdl quartus
UART
- 串口实验，很好用，我还有verilog HDL VHDL CPLD EPM1270 源代码-Serial experiments, very good, and I still have the source code verilog HDLVHDL CPLDEPM1270
UART
- 内含有完整的UART代码，包括发送和接受，且有testbench，可以直接仿真调试-Contain complete UART code, including send and receive and there testbench, can directly Simulation debugging
UART
- 基于FPGA的UART实现 用VHDL编程-The UART-based FPGA using VHDL Programming
UART
- 简单的uart状态机的编写，作为课程设计的资料，适于入门-UART simple state machine to prepare, as a curriculum design information, suitable for entry-
UART.ZIP
- 一个完整的用cpld实现串口功能的代码。经过验证，不经过任何修改便可使用。-serial port realized by vhdl.It has been tested and can be used with any change.
UART
- UART通信协议的硬件描述语言代码，用与FPGA的总线接口开发-UART communication protocol of the hardware descr iption language code, using the bus interface with the FPGA development
UART
- UART是一种广泛应用于短距离、低速、低成本通信的串行传输接口.由于常用UART芯片比较复杂且移植性差,提出一种采用可编程器件FPGA实现UART的方法, 实现了对UART的模块化设计.首先简要介绍UART的基本特点,然后依据其系统组成设计顶层模块,再采用有限状态机设计接收器模块和发送器模块,所有功能的实现全部采用VHDL进行描述,并用Modelsim软件对所有模块仿真实现.最后将UART的核心功能集成到FPGA上,使整体设计紧凑,小巧,实现的UART功能稳定、可靠. -UART is a wi
UART
- Hardware Design with VHDL Design Example: UART
uart
- uart send resive module
UART
- minimum uart Image for transfer image to FPGA then read again by PC
Uart
- Uart总线，VHDL语言，硬件描述语言源码-Uart bus, VHDL language, VHDL source code
UART
- 包含一个在QUARYUS环境下运行的UART的工程，实际在EP2C20Q240上调试成功的通用串口VHDL程序-The QUARYUS environment contains a UART to run the project, the actual success of the EP2C20Q240 Universal Serial debugging VHDL programs
uart
- uart-universal aynchronious reciever and transmitter used to connect the pc and fpga to pass the data
uart-vhdl-testbench
- simple uart vhdl behavioural model (package) vhdl testbench example