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module
- 基于VHDL语言，设计7段LED液晶显示屏，可以下载到相关的xilinx开发板上进行验证-Based on the VHDL language, design 7 LED LCD screen, can be downloaded to the relevant board to verify the development of xilinx
FPGA-DDC
- 基于FPGA的直接数字频率合成器的设计和实现。-FPGA-Based Direct Digital Frequency Synthesizer Design and Implementation.
ISE
- 介绍Xilinx公司FPGA/CPLD的集成开发环境——ISE软件的简单使用，该软件环境集成了FPGA的整个开发过程所用到的工具。主要介绍了用VHDL、VerilogHDL、原理图以及用ModelSim 仿真工具对设计进行功能仿真和时序仿真以及将数据流文件加载到FPGA等方面的内容。-Xilinx Inc. introduced FPGA/CPLD integrated development environment- ISE software simple to use, the softwa
pushbutton_wrapper
- 赛灵思FPAG开发板上的按钮VHDL源代码，对于硬件设计可以借鉴的好材料！-Xilinx development board FPAG button VHDL source code for the hardware design can learn from the good material!
dip_switch_wrapper
- 赛灵思开发板dip开关的VHDL源代码，对于硬件开发参考的材料！-Xilinx development board dip switches, VHDL source code for the hardware development of reference materials!
clock_generator_0_wrapper
- 赛灵思FPGA开发板上时钟源的VHDL源代码，可作为硬件设计参考资料！-Xilinx FPGA development board clock source of the VHDL source code, hardware design can be used as reference!
debug_module_wrapper
- 赛灵思FPGA开发板上调试模块的VHDL源代码，可作为硬件设计参考资料！-Xilinx FPGA development board debug module' s VHDL source code, hardware design can be used as reference!
bram_block_0_wrapper
- 赛灵思FPGA开发板上BRAM模块VHDL源代码，可作为硬件设计参考资料！-Xilinx FPGA development board BRAM module VHDL source code, hardware design can be used as reference!
Xilinx_TMR_XVRWARE_Library
- XVRWARE Library Xilinx Inc. The XVRWARE Synthesis library provides macros and synthesis examples for constructing TMR circuits in VHDL for the Virtex architecture
EDA
- VHDL上机手册（基于Xilinx ISE） ___________________________________________________ 1 ISE 软件的运行 2 创建一个新工程 3 创建一个VHDL源文件框架 4 输入VHDL程序 *5 仿真 6 创建Testbench波形源文件 7 设置输入仿真波形 -eda
stopwatchVHDL
- Stopwatch program in VHDL using Xilinx.
DECADE
- Decade Counter in VHDL using Xilinx tool
fpga
- fpga数字电子系统设计与开发 ISE I2C UART usb vga -ISE I2C UART usb vga
i2cxlinx
- xilinx版本的i2c的VHDL语言版-i2c of xilinx（vdhl）
FILTRO_DIGITAL_EN_VHDL
- DIGITAL FILTER IN VHDL FOR XILINX FPGA SPARTAN 3
Leds
- Multiple frequency dividers in VHDL, with comments in Spanish. Is a project done with Xilinx ISE application. It divides 50 MHz in 1, 2, 4 and 8 Hz.
picieee.tar
- The Synthetic PIC is a synthesizable VHDL descr iption of the basic Microchip PIC 16C5X microcontroller. It is written in the ViewLogic VHDL environment (Workview PLUS 5.2). It has successfully been synthesized to the XC4000 family, although
XilinxExample.tar
- xilinx software to demonstrate vhdl programming
calculator
- 此源码为在xilinx环境中用VHDL实现计算器，实例可用xcs40xl-4-pq208戓xc2s100-6pq208FPGA来实现-The source code in xilinx environment using VHDL implementation calculators, examples can be xcs40xl-4-pq208 Ge xc2s100-6pq208FPGA to achieve
SinusGen1
- sine wave vhdl code that generates sine wave output using logibox in xilinx