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dds_ise7.1_su
- 用Verilog语言实现信号发生器，包括AM，FM,PM，ASK,PSK,FSK调制。-using Verilog language signal generator, including AM, FM, PM, ASK, PSK, FSK modulation.
2ask
- 2ASK 模块的Verilog实现，附带完整的测试文件-2ASK Verilog module implementation, with a complete test file
ASK_modulator
- 振幅键控ASK的调制解调Verilog实现，带测试文件-ASK amplitude shift keying modulation and demodulation Verilog implementation, with the test file
ASK_32M
- ASK实现 运用verilog语言编程实现，目标FPGA为EP3C25Q240-ASK use verilog language programming to achieve the realization of the target FPGA for EP3C25Q240
module_dem
- 用verilog编写的信号调制解调程序，包括ask,fsk,qpsk的fpga实现-Prepared using verilog signal modulation and demodulation process, including ask, fsk, qpsk of fpga implementation
askcodec
- verilog实现ask编码器，仿真通过-ask encoder verilog implementation, simulation by
2fsk
- 2ASK 模块的Verilog实现，附带完整的测试文件-2ASK Verilog module implementation, with a complete test file
FPGA_verilog
- FPGA很有价值的27实例:如ASK、PSK、FSK调制与解调VHDL程序及仿真等-FPGA verilog
ASKencoderanddecoder
- ASK编码器与译码器，使用Verilog编写-ASK encoder and decoder, the use of writing Verilog
code
- <基于Verilog HDL的通信系统设计>源码，包含ASK,FSK,PSK,QPSK,PPM等的调制解调-< Verilog HDL-based communication system design> source, including ASK, FSK, PSK, QPSK, PPM and other modem
DDS
- 能在DDS中用Verilog HDL语言实现FM,AM,FSK,ASK,PSK，结合可编程器件FGPA等等就能实现这些功能 -DDS can be used in Verilog HDL language FM, AM, FSK, ASK, PSK, etc. FGPA programmable devices can be combined to achieve these functions
ask-psk-qpsk
- ask，psk ,qpsk 调试解调verilog源码，是无线通信fpga设计这本书上的，比较简单的实现方式-ask, psk, qpsk debugging demodulator verilog source, is a wireless communications fpga design of this book, a relatively simple way to achieve
ad9850
- 介绍了用FPGA控制DDS产生任意频率范围之内的可调制正弦波，13位BPSK,ASK等。控制字由串口写入。-verilog control AD9850 to get psk ask
modulation-and-demodulation
- 调制与解调系统的FPGA设计实现,包括2-ASK调制和解调,2-FSK调制和解调,2-PSK调制和解调,QPSK调制和解调,PPM调制和解调的verilog源代码。-FPGA design implementation of modulation and demodulation system, including 2-ASK modulation and demodulation, 2-FSK modulation and demodulation, 2-PSK modulation and
ASK_implement
- Implementation of ASK techniqe as digital modulation tchnique using Verilog
ADC
- verilog At the last, before starting fist go through the FPGA NEXYS2 Board manual. It will be useful for you for this interfacing and also for the future. Best of luck…, try this one because practice makes man perfect. And, yes also if you have a
ASKMod
- ASK调制信号的verilog VHL设计，在ise中实现了ASK信号的调制解调。-ASK modulation signal verilog VHL design, in ise to achieve the ASK signal modulation and demodulation.
ASKMod
- 能够实现一种ASK的调制方法，语言为verilog(Can achieve a modulation method of ASK, the language is Verilog)
ASK
- ASK调制,verilog VHDL 编程语言实现，其中带有仿真文件(ASK modulation signal)